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Class Information
Number: 257/E21.573
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Processes or apparatus adapted for manufacture or treatment of semiconductor or solid-state devices or of parts thereof (epo) > Manufacture or treatment of devices consisting of plurality of solid-state components formed in or on common substrate or of parts thereof; manufacture of integrated circuit devices or of parts thereof (epo) > Manufacture of specific parts of devices (epo) > Making of isolation regions between components (epo) > Air gaps (epo)
Description: This subclass is indented under subclass E21.54. This subclass is substantially the same in scope as ECLA classification H01L21/764.
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7396728 |
Methods of improving drive currents by employing strain inducing STI liners |
Jul. 8, 2008 |
| 7335965 |
Packaging of electronic chips with air-bridge structures |
Feb. 26, 2008 |
| 7316957 |
Semiconductor device and method for manufacturing the same |
Jan. 8, 2008 |
| 7312512 |
Interconnect structure with polygon cell structures |
Dec. 25, 2007 |
| 7307011 |
Structure and method for forming a dielectric chamber and electronic device including the dielectric chamber |
Dec. 11, 2007 |
| 7235456 |
Method of making empty space in silicon |
Jun. 26, 2007 |
| 7211496 |
Freestanding multiplayer IC wiring structure |
May. 1, 2007 |
| 7208839 |
Semiconductor component assemblies having interconnects |
Apr. 24, 2007 |
| 7190046 |
Bipolar transistor having reduced collector-base capacitance |
Mar. 13, 2007 |
| 7166486 |
Optical modulator, optical modulator manufacturing method, light information processing apparatus including optical modulator, image formation apparatus including optical modulator, and image |
Jan. 23, 2007 |
| 7163869 |
Shallow trench isolation structure with converted liner layer |
Jan. 16, 2007 |
| 7145215 |
Semiconductor device with a cavity therein and a method of manufacturing the same |
Dec. 5, 2006 |
| 7138720 |
Semiconductor component assemblies having interconnects |
Nov. 21, 2006 |
| 7084479 |
Line level air gaps |
Aug. 1, 2006 |
| 7063798 |
Method for realizing microchannels in an integrated structure |
Jun. 20, 2006 |
| 7052967 |
Method for fabricating capacitor array preventing crosstalk between adjacent capacitors in semiconductor device |
May. 30, 2006 |
| 7038289 |
Deep insulating trench |
May. 2, 2006 |
| 7019364 |
Semiconductor substrate having pillars within a closed empty space |
Mar. 28, 2006 |
| 7015116 |
Stress-relieved shallow trench isolation (STI) structure and method for forming the same |
Mar. 21, 2006 |
| 7009273 |
Semiconductor device with a cavity therein and a method of manufacturing the same |
Mar. 7, 2006 |
| 7005248 |
Method of forming cavity between multilayered wirings |
Feb. 28, 2006 |
| 7001822 |
Semiconductor device formed on insulating layer and method of manufacturing the same |
Feb. 21, 2006 |
| 6987051 |
Method of making cavities in a semiconductor wafer |
Jan. 17, 2006 |
| 6949839 |
Aligned buried structures formed by surface transformation of empty spaces in solid state materials |
Sep. 27, 2005 |
| 6921704 |
Method for improving MOS mobility |
Jul. 26, 2005 |
| 6903461 |
Semiconductor device having a region of a material which is vaporized upon exposing to ultraviolet radiation |
Jun. 7, 2005 |
| 6891387 |
System for probing, testing, burn-in, repairing and programming of integrated circuits |
May. 10, 2005 |
| 6869856 |
Process for manufacturing a semiconductor wafer integrating electronic devices including a structure for electromagnetic decoupling |
Mar. 22, 2005 |
| 6849918 |
Miniaturized dielectrically isolated solid state device |
Feb. 1, 2005 |
| 6841408 |
Method of alignment for buried structures formed by surface transformation of empty spaces in solid state materials |
Jan. 11, 2005 |
| 6838896 |
Method and system for probing, testing, burn-in, repairing and programming of integrated circuits in a closed environment using a single apparatus |
Jan. 4, 2005 |
| 6830987 |
Semiconductor device with a silicon-on-void structure and method of making the same |
Dec. 14, 2004 |
| 6828646 |
Isolating trench and manufacturing process |
Dec. 7, 2004 |
| 6828171 |
Systems and methods for thermal isolation of a silicon structure |
Dec. 7, 2004 |
| 6818525 |
Semiconductor device and method of providing regions of low substrate capacitance |
Nov. 16, 2004 |
| 6815826 |
Alignment for buried structures formed by surface transformation of empty spaces in solid state materials |
Nov. 9, 2004 |
| 6812525 |
Trench fill process |
Nov. 2, 2004 |
| 6812508 |
Semiconductor substrate and method for fabricating the same |
Nov. 2, 2004 |
| 6790751 |
Semiconductor substrate for a one-chip electronic device and related manufacturing method |
Sep. 14, 2004 |
| 6791155 |
Stress-relieved shallow trench isolation (STI) structure and method for forming the same |
Sep. 14, 2004 |
| 6784076 |
Process for making a silicon-on-insulator ledge by implanting ions from silicon source |
Aug. 31, 2004 |
| 6780753 |
Airgap for semiconductor devices |
Aug. 24, 2004 |
| 6759746 |
Die attachment and method |
Jul. 6, 2004 |
| 6734094 |
Method of forming an air gap within a structure by exposing an ultraviolet sensitive material to ultraviolet radiation |
May. 11, 2004 |
| 6727157 |
Method for forming a shallow trench isolation using air gap |
Apr. 27, 2004 |
| 6714625 |
Lithography device for semiconductor circuit pattern generation |
Mar. 30, 2004 |
| 6713356 |
Method for making a semiconductor device comprising a stack alternately consisting of silicon layers and dielectric material layers |
Mar. 30, 2004 |
| 6713235 |
Method for fabricating thin-film substrate and thin-film substrate fabricated by the method |
Mar. 30, 2004 |
| 6713327 |
Stress controlled dielectric integrated circuit fabrication |
Mar. 30, 2004 |
| 6682981 |
Stress controlled dielectric integrated circuit fabrication |
Jan. 27, 2004 |
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