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Class Information
Number: 257/E21.562
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Processes or apparatus adapted for manufacture or treatment of semiconductor or solid-state devices or of parts thereof (epo) > Manufacture or treatment of devices consisting of plurality of solid-state components formed in or on common substrate or of parts thereof; manufacture of integrated circuit devices or of parts thereof (epo) > Manufacture of specific parts of devices (epo) > Making of isolation regions between components (epo) > Dielectric regions, e.g., epic dielectric isolation, locos; trench refilling techniques, soi technology, use of channel stoppers (epo) > Using semiconductor or insulator technology, i.e., soi technology (epo) > Using selective deposition of single crystal silicon, e.g., selective epitaxial growth (seg) (epo)
Description: This subclass is indented under subclass E21.561. This subclass is substantially the same in scope as ECLA classification H01L21/762D10.


Patents under this class:

Patent Number Title Of Patent Date Issued
7405140 Low temperature formation of patterned epitaxial Si containing films Jul. 29, 2008
7399686 Method and apparatus for making coplanar dielectrically-isolated regions of different semiconductor materials on a substrate Jul. 15, 2008
7355248 Metal oxide semiconductor (MOS) device, metal oxide semiconductor (MOS) memory device, and method of manufacturing the same Apr. 8, 2008
7352034 Semiconductor structures integrating damascene-body FinFET's and planar devices on a common substrate and methods for forming such semiconductor structures Apr. 1, 2008
7351633 Method of fabricating semiconductor device using selective epitaxial growth Apr. 1, 2008
7344957 SOI wafer with cooling channels and a method of manufacture thereof Mar. 18, 2008
7335541 Method for fabricating thin film transistor using the mask for forming polysilicon including slit patterns deviated from each other Feb. 26, 2008
7265417 Method of fabricating semiconductor side wall fin Sep. 4, 2007
7186627 Method for forming device isolation film of semiconductor device Mar. 6, 2007
7172930 Strained silicon-on-insulator by anodization of a buried p+ silicon germanium layer Feb. 6, 2007
7078299 Formation of finFET using a sidewall epitaxial layer Jul. 18, 2006
7071073 Process for manufacturing low-cost and high-quality SOI substrates Jul. 4, 2006
7015517 Semiconductor device incorporating a defect controlled strained channel structure and method of making the same Mar. 21, 2006
7015121 Semiconductor device and method of manufacturing the same Mar. 21, 2006
6989316 Semiconductor device and method for manufacturing Jan. 24, 2006
6919258 Semiconductor device incorporating a defect controlled strained channel structure and method of making the same Jul. 19, 2005
6911380 Method of forming silicon on insulator wafers Jun. 28, 2005
6787433 Semiconductor device and method of manufacturing the same Sep. 7, 2004
6768175 Semiconductor substrate and its production method, semiconductor device comprising the same and its production method Jul. 27, 2004
6734030 Semiconductor light emitting device and method of fabricating semiconductor light emitting device May. 11, 2004
6727567 Integrated circuit device substrates with selective epitaxial growth thickness compensation Apr. 27, 2004
6670257 Method for forming horizontal buried channels or cavities in wafers of monocrystalline semiconductor material Dec. 30, 2003
6635543 SOI hybrid structure with selective epitaxial growth of silicon Oct. 21, 2003
6617226 Semiconductor device and method for manufacturing the same Sep. 9, 2003
6583451 Process for fabricating a network of nanometric lines made of single-crystal silicon and device obtained Jun. 24, 2003
6555891 SOI hybrid structure with selective epitaxial growth of silicon Apr. 29, 2003
6506663 Method for producing an SOI wafer Jan. 14, 2003
6479354 Semiconductor device with selective epitaxial growth layer and isolation method in a semiconductor device Nov. 12, 2002
6409829 Manufacture of dielectrically isolated integrated circuits Jun. 25, 2002
6403427 Field effect transistor having dielectrically isolated sources and drains and method for making same Jun. 11, 2002
6399961 Field effect transistor having dielectrically isolated sources and drains and method for making same Jun. 4, 2002
6399429 Method of forming monocrystalline silicon layer, method for manufacturing semiconductor device, and semiconductor device Jun. 4, 2002
6380074 Deposition of various base layers for selective layer growth in semiconductor production Apr. 30, 2002
6350657 Inexpensive method of manufacturing an SOI wafer Feb. 26, 2002
6300209 Method of fabricating triple well of semiconductor device using SEG Oct. 9, 2001
6277712 Multilayered wafer with thick sacrificial layer using porous silicon or porous silicon oxide and fabrication method thereof Aug. 21, 2001
6265089 Electronic devices grown on off-axis sapphire substrate Jul. 24, 2001
6225666 Low stress active area silicon island structure with a non-rectangular cross-section profile and method for its formation May. 1, 2001
6198114 Field effect transistor having dielectrically isolated sources and drains and method for making same Mar. 6, 2001
6143629 Process for producing semiconductor substrate Nov. 7, 2000
6037198 Method of fabricating SOI wafer Mar. 14, 2000



 
 
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