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Class Information
Number: 257/E21.556
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Processes or apparatus adapted for manufacture or treatment of semiconductor or solid-state devices or of parts thereof (epo) > Manufacture or treatment of devices consisting of plurality of solid-state components formed in or on common substrate or of parts thereof; manufacture of integrated circuit devices or of parts thereof (epo) > Manufacture of specific parts of devices (epo) > Making of isolation regions between components (epo) > Dielectric regions, e.g., epic dielectric isolation, locos; trench refilling techniques, soi technology, use of channel stoppers (epo) > Using local oxidation of silicon, e.g., locos, swami, silo (epo) > Introducing electrical inactive or active impurities in local oxidation region, e.g., to alter locos oxide growth characteristics or for additional isolation purpose (epo)
Description: This subclass is indented under subclass E21.552. This subclass is substantially the same in scope as ECLA classification H01L21/762B4.
Sub-classes under this class:
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7998823 |
Method for reducing leakage currents caused by misalignment of a contact structure by increasing an error tolerance of the contact patterning process |
Aug. 16, 2011 |
| 7781303 |
Method for preparing a shallow trench isolation |
Aug. 24, 2010 |
| 7718506 |
Isolation structure for MOS transistor and method for forming the same |
May. 18, 2010 |
| 7384846 |
Method of fabricating semiconductor device |
Jun. 10, 2008 |
| 7259055 |
Method of forming high-luminescence silicon electroluminescence device |
Aug. 21, 2007 |
| 6979628 |
Methods of forming semiconductor devices having field oxides in trenches and devices formed thereby |
Dec. 27, 2005 |
| 6908819 |
Method of fabricating flat-cell mask read-only memory devices |
Jun. 21, 2005 |
| 6869891 |
Semiconductor device having groove and method of fabricating the same |
Mar. 22, 2005 |
| 6849519 |
Method of forming an isolation layer in a semiconductor devices |
Feb. 1, 2005 |
| 6727573 |
Semiconductor device having triple well structure |
Apr. 27, 2004 |
| 6686255 |
Amorphizing ion implant local oxidation of silicon (LOCOS) method for forming an isolation region |
Feb. 3, 2004 |
| 6664182 |
Method of improving the interlayer adhesion property of low-k layers in a dual damascene process |
Dec. 16, 2003 |
| 6593637 |
Method for establishing component isolation regions in SOI semiconductor device |
Jul. 15, 2003 |
| 6561839 |
Process for forming shallow isolating regions in an integrated circuit and an integrated circuit thus formed |
May. 13, 2003 |
| 6528390 |
Process for fabricating a non-volatile memory device |
Mar. 4, 2003 |
| 6475915 |
Ono etch using CL2/HE chemistry |
Nov. 5, 2002 |
| 6465822 |
Semiconductor device having a reduced-capacitance conductive layer and fabrication method for the same |
Oct. 15, 2002 |
| 6391730 |
Process for fabricating shallow pocket regions in a non-volatile semiconductor device |
May. 21, 2002 |
| 6376331 |
Method for manufacturing a semiconductor device |
Apr. 23, 2002 |
| 6358865 |
Oxidation of silicon using fluorine implant |
Mar. 19, 2002 |
| 6337173 |
Method for fabricating a semiconductor capacitor |
Jan. 8, 2002 |
| 6333243 |
Method for growing field oxide to minimize birds' beak length |
Dec. 25, 2001 |
| 6274455 |
Method for isolating semiconductor device |
Aug. 14, 2001 |
| 6268266 |
Method for forming enhanced FOX region of low voltage device in high voltage process |
Jul. 31, 2001 |
| 6258695 |
Dislocation suppression by carbon incorporation |
Jul. 10, 2001 |
| 6258694 |
Fabrication method of a device isolation structure |
Jul. 10, 2001 |
| 6258693 |
Ion implantation for scalability of isolation in an integrated circuit |
Jul. 10, 2001 |
| 6251744 |
Implant method to improve characteristics of high voltage isolation and high voltage breakdown |
Jun. 26, 2001 |
| 6242294 |
Method for fabricating a semiconductor device |
Jun. 5, 2001 |
| 6235607 |
Method for establishing component isolation regions in SOI semiconductor device |
May. 22, 2001 |
| 6225231 |
Recovery of damages in a field oxide caused by high energy ion implant process |
May. 1, 2001 |
| 6221731 |
Process of fabricating buried diffusion junction |
Apr. 24, 2001 |
| 6194288 |
Implant N2 into a pad oxide film to mask the active region and grow field oxide without Si3N4 film |
Feb. 27, 2001 |
| 6174758 |
Semiconductor chip having fieldless array with salicide gates and methods for making same |
Jan. 16, 2001 |
| 6171927 |
Device with differential field isolation thicknesses and related methods |
Jan. 9, 2001 |
| 6150227 |
Integrated circuit structure with a gap between resistor film and substrate |
Nov. 21, 2000 |
| 6144047 |
Semiconductor device having impurity concentrations for preventing a parasitic channel |
Nov. 7, 2000 |
| 6096623 |
Method for forming shallow trench isolation structure |
Aug. 1, 2000 |
| 6097062 |
Optimized trench edge formation integrated with high quality gate formation |
Aug. 1, 2000 |
| 6093936 |
Integrated circuit with isolation of field oxidation by noble gas implantation |
Jul. 25, 2000 |
| 6069054 |
Method for forming isolation regions subsequent to gate formation and structure thereof |
May. 30, 2000 |
| 6060403 |
Method of manufacturing semiconductor device |
May. 9, 2000 |
| 6048760 |
Method of forming a self-aligned refractory metal silicide contact using doped field oxide regions |
Apr. 11, 2000 |
| 6027984 |
Method for growing oxide |
Feb. 22, 2000 |
| 6023093 |
Deuterated direlectric and polysilicon film-based semiconductor devices and method of manufacture thereof |
Feb. 8, 2000 |
| 6013557 |
Advanced CMOS isolation utilizing enhanced oxidation by light ion implantation |
Jan. 11, 2000 |
| 6008526 |
Device isolation layer for a semiconductor device |
Dec. 28, 1999 |
| 6001709 |
Modified LOCOS isolation process for semiconductor devices |
Dec. 14, 1999 |
| 5994200 |
Trench isolation structure of a semiconductor device and a method for thereof |
Nov. 30, 1999 |
| 5976952 |
Implanted isolation structure formation for high density CMOS integrated circuits |
Nov. 2, 1999 |
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