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Class Information
Number: 257/E21.553
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Processes or apparatus adapted for manufacture or treatment of semiconductor or solid-state devices or of parts thereof (epo) > Manufacture or treatment of devices consisting of plurality of solid-state components formed in or on common substrate or of parts thereof; manufacture of integrated circuit devices or of parts thereof (epo) > Manufacture of specific parts of devices (epo) > Making of isolation regions between components (epo) > Dielectric regions, e.g., epic dielectric isolation, locos; trench refilling techniques, soi technology, use of channel stoppers (epo) > Using local oxidation of silicon, e.g., locos, swami, silo (epo) > In region recessed from surface, e.g., in recess, groove, tub or trench region (epo)
Description: This subclass is indented under subclass E21.552. This subclass is substantially the same in scope as ECLA classification H01L21/762B2.

Sub-classes under this class:

Class Number Class Name Patents
257/E21.555 Recessed region having shape other than rectangular, e.g., rounded or oblique shape (epo) 96
257/E21.554 Using auxiliary pillars in recessed region, e.g., to form locos over extended areas (epo) 44

Patents under this class:
1 2 3 4 5

Patent Number Title Of Patent Date Issued
8680610 Trench MOSFET having floating dummy cells for avalanche improvement Mar. 25, 2014
8652902 Floating gate semiconductor memory device and method for producing such a device Feb. 18, 2014
8546234 Semiconductor process Oct. 1, 2013
8497206 Method of processing backside copper layer for semiconductor chips Jul. 30, 2013
8390129 Semiconductor device with a plurality of mark through substrate vias Mar. 5, 2013
8319290 Trench MOS barrier schottky rectifier with a planar surface using CMP techniques Nov. 27, 2012
8309425 Method of manufacturing semiconductor device Nov. 13, 2012
8247305 Method and resulting structure for deep trench polysilicon hard mask removal Aug. 21, 2012
8242583 Semiconductor device having CMP dummy pattern Aug. 14, 2012
8211778 Forming isolation regions for integrated circuits Jul. 3, 2012
8169054 Semiconductor device and method of manufacturing the same May. 1, 2012
8076237 Method and apparatus for 3D interconnect Dec. 13, 2011
8058685 Trench MOSFET structures using three masks process Nov. 15, 2011
8026571 Semiconductor-device isolation structure Sep. 27, 2011
7981759 Local oxidation of silicon planarization for polysilicon layers under thin film structures Jul. 19, 2011
7977204 Method of forming a fine pattern of a semiconductor device using a double patterning technique Jul. 12, 2011
7951683 In-situ process layer using silicon-rich-oxide for etch selectivity in high AR gapfill May. 31, 2011
7923330 Method for manufacturing a semiconductor device Apr. 12, 2011
7863072 Micromechanical diaphragm sensor having a double diaphragm Jan. 4, 2011
7863190 Method of selective coverage of high aspect ratio structures with a conformal film Jan. 4, 2011
7846792 Method for manufacturing semiconductor device and semiconductor device manufacturing system Dec. 7, 2010
7829977 Low temperature co-fired ceramics substrate and semiconductor package Nov. 9, 2010
7825040 Method for depositing flowable material using alkoxysilane or aminosilane precursor Nov. 2, 2010
7816228 Method of manufacturing a semiconductor device Oct. 19, 2010
7816720 Trench MOSFET structure having improved avalanche capability using three masks process Oct. 19, 2010
7804129 Recessed gate electrode MOS transistor and method for fabricating the same Sep. 28, 2010
7687862 Semiconductor devices with active regions of different heights Mar. 30, 2010
7667266 Semiconductor device including active pattern with channel recess, and method of fabricating the same Feb. 23, 2010
7648921 Method of forming dielectric layer Jan. 19, 2010
7625806 Method of fabricating a non-floating body device with enhanced performance Dec. 1, 2009
7625820 Method of selective coverage of high aspect ratio structures with a conformal film Dec. 1, 2009
7588996 Oxide pattern forming method and patterning method of semiconductor device Sep. 15, 2009
7557420 Low temperature process for polysilazane oxidation/densification Jul. 7, 2009
7553717 Recess etch for epitaxial SiGe Jun. 30, 2009
7544620 Process for digging a deep trench in a semiconductor body and semiconductor body so obtained Jun. 9, 2009
7521333 Methods of fabricating trench isolation structures having varying depth Apr. 21, 2009
7482697 Double-sided waffle pack Jan. 27, 2009
7436030 Strained MOSFETs on separated silicon layers Oct. 14, 2008
7384846 Method of fabricating semiconductor device Jun. 10, 2008
7371693 Manufacturing method of semiconductor device with chamfering May. 13, 2008
7365413 Reduced power distribution mesh resistance using a modified swiss-cheese slotting pattern Apr. 29, 2008
7361572 STI liner modification method Apr. 22, 2008
7314792 Method for fabricating transistor of semiconductor device Jan. 1, 2008
7279396 Methods of forming trench isolation regions with nitride liner Oct. 9, 2007
7220640 Method of fabricating recess transistor in integrated circuit device and recess transistor in integrated circuit device fabricated by the same May. 22, 2007
7199450 Materials and method to seal vias in silicon substrates Apr. 3, 2007
7157781 Enhancement of membrane characteristics in semiconductor device with membrane Jan. 2, 2007
7061128 Semiconductor device and manufacturing method of the same Jun. 13, 2006
7060630 Method of forming isolation film of semiconductor device Jun. 13, 2006
7049206 Device isolation for semiconductor devices May. 23, 2006

1 2 3 4 5

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