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Class Information
Number: 257/E21.55
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Processes or apparatus adapted for manufacture or treatment of semiconductor or solid-state devices or of parts thereof (epo) > Manufacture or treatment of devices consisting of plurality of solid-state components formed in or on common substrate or of parts thereof; manufacture of integrated circuit devices or of parts thereof (epo) > Manufacture of specific parts of devices (epo) > Making of isolation regions between components (epo) > Dielectric regions, e.g., epic dielectric isolation, locos; trench refilling techniques, soi technology, use of channel stoppers (epo) > Using trench refilling with dielectric materials (epo) > Of trenches having shape other than rectangular or v shape, e.g., rounded corners, oblique or rounded trench walls (epo) > Trench shape altered by local oxidation of silicon process step, e.g., trench corner rounding by locos (epo)
Description: This subclass is indented under subclass E21.549. This subclass is substantially the same in scope as ECLA classification H01L21/762C6A.

Patents under this class:
1 2 3 4 5

Patent Number Title Of Patent Date Issued
8709901 Method of forming an isolation structure Apr. 29, 2014
8680610 Trench MOSFET having floating dummy cells for avalanche improvement Mar. 25, 2014
8546855 Charging protection device Oct. 1, 2013
8471346 Semiconductor device including a cavity Jun. 25, 2013
8288185 Semiconductor devices and methods of forming the same Oct. 16, 2012
8269306 Isolation regions Sep. 18, 2012
8232180 Manufacturing method of semiconductor device comprising active region divided by STI element isolation structure Jul. 31, 2012
8211778 Forming isolation regions for integrated circuits Jul. 3, 2012
8198688 Semiconductor integrated circuit device with MOSFET limiter circuit Jun. 12, 2012
8124494 Method for reshaping silicon surfaces with shallow trench isolation Feb. 28, 2012
8119486 Methods of manufacturing semiconductor devices having a recessed-channel Feb. 21, 2012
8072032 Semiconductor integrated circuit device having latchup preventing function Dec. 6, 2011
8058685 Trench MOSFET structures using three masks process Nov. 15, 2011
8053322 Epitaxial deposition-based processes for reducing gate dielectric thinning at trench edges and integrated circuits therefrom Nov. 8, 2011
8048753 Charging protection device Nov. 1, 2011
8030171 Method of forming element isolation film and nonvolatile semiconductor memory Oct. 4, 2011
7964900 Semiconductor device with semi-insulating substrate portions Jun. 21, 2011
7951683 In-situ process layer using silicon-rich-oxide for etch selectivity in high AR gapfill May. 31, 2011
7919368 Area-efficient electrically erasable programmable memory cell Apr. 5, 2011
7858489 Method for manufacturing semiconductor device capable of increasing current drivability of PMOS transistor Dec. 28, 2010
7851858 MOSFET having SOI and method Dec. 14, 2010
7816720 Trench MOSFET structure having improved avalanche capability using three masks process Oct. 19, 2010
7811935 Isolation regions and their formation Oct. 12, 2010
7804151 Integrated circuit structure, design structure, and method having improved isolation and harmonics Sep. 28, 2010
7791161 Semiconductor devices employing poly-filled trenches Sep. 7, 2010
7745304 Method of manufacturing semiconductor device Jun. 29, 2010
7691721 Method for manufacturing flash memory device Apr. 6, 2010
7687370 Method of forming a semiconductor isolation trench Mar. 30, 2010
7678634 Local stress engineering for CMOS devices Mar. 16, 2010
7671441 Trench MOSFET with sidewall spacer gates Mar. 2, 2010
7655524 Method for manufacturing isolation layer having barrier layer formed thereon Feb. 2, 2010
7648921 Method of forming dielectric layer Jan. 19, 2010
7642172 Method of forming isolation layer in semiconductor device Jan. 5, 2010
7625805 Passivation of deep isolating separating trenches with sunk covering layers Dec. 1, 2009
7622369 Device isolation technology on semiconductor substrate Nov. 24, 2009
7622358 Semiconductor device with semi-insulating substrate portions and method for forming the same Nov. 24, 2009
7592229 Method for fabricating a recessed-gate MOS transistor device Sep. 22, 2009
7560389 Method for fabricating semiconductor element Jul. 14, 2009
7541244 Semiconductor device having a trench gate and method of fabricating the same Jun. 2, 2009
7495267 Semiconductor structure having a strained region and a method of fabricating same Feb. 24, 2009
7482246 Trench isolation structure in a semiconductor device and method for fabricating the same Jan. 27, 2009
7453134 Integrated circuit device with a circuit element formed on an active region having rounded corners Nov. 18, 2008
7436030 Strained MOSFETs on separated silicon layers Oct. 14, 2008
7405461 Semiconductor device and method for manufacturing semiconductor device Jul. 29, 2008
7396729 Methods of forming semiconductor devices having a trench with beveled corners Jul. 8, 2008
7391096 STI structure Jun. 24, 2008
7390717 Trench power MOSFET fabrication using inside/outside spacers Jun. 24, 2008
7358587 Semiconductor structures Apr. 15, 2008
7339252 Semiconductor having thick dielectric regions Mar. 4, 2008
7279396 Methods of forming trench isolation regions with nitride liner Oct. 9, 2007

1 2 3 4 5

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