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Class Information
Number: 257/E21.549
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Processes or apparatus adapted for manufacture or treatment of semiconductor or solid-state devices or of parts thereof (epo) > Manufacture or treatment of devices consisting of plurality of solid-state components formed in or on common substrate or of parts thereof; manufacture of integrated circuit devices or of parts thereof (epo) > Manufacture of specific parts of devices (epo) > Making of isolation regions between components (epo) > Dielectric regions, e.g., epic dielectric isolation, locos; trench refilling techniques, soi technology, use of channel stoppers (epo) > Using trench refilling with dielectric materials (epo) > Of trenches having shape other than rectangular or v shape, e.g., rounded corners, oblique or rounded trench walls (epo)
Description: This subclass is indented under subclass E21.546. This subclass is substantially the same in scope as ECLA classification H01L21/762C6.
Sub-classes under this class:
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7625805 |
Passivation of deep isolating separating trenches with sunk covering layers |
Dec. 1, 2009 |
| 7622369 |
Device isolation technology on semiconductor substrate |
Nov. 24, 2009 |
| 7622778 |
Semiconductor device having shallow trench isolation structure comprising an upper trench and a lower trench including a void |
Nov. 24, 2009 |
| 7611962 |
Method for fabricating semiconductor device |
Nov. 3, 2009 |
| 7608878 |
Semiconductor device manufactured with a double shallow trench isolation process |
Oct. 27, 2009 |
| 7608518 |
Semiconductor device and method for fabricating the same |
Oct. 27, 2009 |
| 7572712 |
Method to form selective strained Si using lateral epitaxy |
Aug. 11, 2009 |
| 7563720 |
Boron doped shell for MEMS device |
Jul. 21, 2009 |
| 7538009 |
Method for fabricating STI gap fill oxide layer in semiconductor devices |
May. 26, 2009 |
| 7510894 |
Post-logic isolation of silicon regions for an integrated sensor |
Mar. 31, 2009 |
| 7494894 |
Protection in integrated circuits |
Feb. 24, 2009 |
| 7479688 |
STI stress modification by nitrogen plasma treatment for improving performance in small width devices |
Jan. 20, 2009 |
| 7476610 |
Removable spacer |
Jan. 13, 2009 |
| 7456067 |
Method with high gapfill capability for semiconductor devices |
Nov. 25, 2008 |
| 7456102 |
Electroless copper fill process |
Nov. 25, 2008 |
| 7453134 |
Integrated circuit device with a circuit element formed on an active region having rounded corners |
Nov. 18, 2008 |
| 7449392 |
Semiconductor device capable of threshold voltage adjustment by applying an external voltage |
Nov. 11, 2008 |
| 7442620 |
Methods for forming a trench isolation structure with rounded corners in a silicon substrate |
Oct. 28, 2008 |
| 7442618 |
Method to engineer etch profiles in Si substrate for advanced semiconductor devices |
Oct. 28, 2008 |
| 7396728 |
Methods of improving drive currents by employing strain inducing STI liners |
Jul. 8, 2008 |
| 7390717 |
Trench power MOSFET fabrication using inside/outside spacers |
Jun. 24, 2008 |
| 7391096 |
STI structure |
Jun. 24, 2008 |
| 7375004 |
Method of making an isolation trench and resulting isolation trench |
May. 20, 2008 |
| 7371655 |
Method of fabricating low-power CMOS device |
May. 13, 2008 |
| 7358588 |
Trench isolation type semiconductor device which prevents a recess from being formed in a field region |
Apr. 15, 2008 |
| 7339252 |
Semiconductor having thick dielectric regions |
Mar. 4, 2008 |
| 7314809 |
Method for forming a shallow trench isolation structure with reduced stress |
Jan. 1, 2008 |
| 7279393 |
Trench isolation structure and method of manufacture therefor |
Oct. 9, 2007 |
| 7273792 |
Semiconductor device and fabricating method thereof |
Sep. 25, 2007 |
| 7205207 |
High performance strained CMOS devices |
Apr. 17, 2007 |
| 7199019 |
Method for forming tungsten contact plug |
Apr. 3, 2007 |
| 7163869 |
Shallow trench isolation structure with converted liner layer |
Jan. 16, 2007 |
| 7160789 |
Shallow trench isolation and method of forming the same |
Jan. 9, 2007 |
| 7148120 |
Method of forming improved rounded corners in STI features |
Dec. 12, 2006 |
| 7141486 |
Shallow trench isolation structures comprising a graded doped sacrificial silicon dioxide material and a method for forming shallow trench isolation structures |
Nov. 28, 2006 |
| 7071043 |
Methods of forming a field effect transistor having source/drain material over insulative material |
Jul. 4, 2006 |
| 7067874 |
Semiconductor device including trench with at least one of an edge of an opening and a bottom surface being round |
Jun. 27, 2006 |
| 7060573 |
Extended poly buffer STI scheme |
Jun. 13, 2006 |
| 7061075 |
Shallow trench isolation using antireflection layer |
Jun. 13, 2006 |
| 7045468 |
Isolated junction structure and method of manufacture |
May. 16, 2006 |
| 7045836 |
Semiconductor structure having a strained region and a method of fabricating same |
May. 16, 2006 |
| 7042062 |
Device isolation structures of semiconductor devices and manufacturing methods thereof |
May. 9, 2006 |
| 7041556 |
Vertical transistor and method of making |
May. 9, 2006 |
| 7037785 |
Method of manufacturing flash memory device |
May. 2, 2006 |
| 7038289 |
Deep insulating trench |
May. 2, 2006 |
| 7030454 |
Semiconductor devices and methods of forming a trench in a semiconductor device |
Apr. 18, 2006 |
| 7029987 |
Method of manufacturing semiconductor device having shallow trench isolation (STI) |
Apr. 18, 2006 |
| 7026210 |
Method for forming a bottle-shaped trench |
Apr. 11, 2006 |
| 7019348 |
Embedded semiconductor product with dual depth isolation regions |
Mar. 28, 2006 |
| 7018931 |
Method of forming an isolation film in a semiconductor device |
Mar. 28, 2006 |
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