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Class Information
Number: 257/E21.544
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Processes or apparatus adapted for manufacture or treatment of semiconductor or solid-state devices or of parts thereof (epo) > Manufacture or treatment of devices consisting of plurality of solid-state components formed in or on common substrate or of parts thereof; manufacture of integrated circuit devices or of parts thereof (epo) > Manufacture of specific parts of devices (epo) > Making of isolation regions between components (epo) > Pn junction isolation (epo)
Description: This subclass is indented under subclass E21.54. This subclass is substantially the same in scope as ECLA classification H01L21/761.

Patents under this class:
1 2 3 4 5 6 7 8 9 10 11

Patent Number Title Of Patent Date Issued
6265248 Method for producing semiconductor-on-insulator structure with reduced parasitic capacitance Jul. 24, 2001
6255190 Method for dielectrically isolated deep pn-junctions in silicon substrates using deep trench sidewall predeposition technology Jul. 3, 2001
6252257 Isolating wall between power components Jun. 26, 2001
6235610 Process for selectively implanting dopants into the bottom of a deep trench May. 22, 2001
6236100 Semiconductor with high-voltage components and low-voltage components on a shared die May. 22, 2001
6232165 Buried guard rings and method for forming the same May. 15, 2001
6225181 Trench isolated bipolar transistor structure integrated with CMOS technology May. 1, 2001
6225199 Semiconductor device having triple-well May. 1, 2001
6225676 Semiconductor device with improved inter-element isolation May. 1, 2001
6225674 Semiconductor structure and method of manufacture May. 1, 2001
6225673 Integrated circuit which minimizes parasitic action in a switching transistor pair May. 1, 2001
6212671 Mask pattern data producing apparatus, mask pattern data producing method and semiconductor integrated circuit device Apr. 3, 2001
6194776 Semiconductor circuit device having triple-well structure in semiconductor substrate, method of fabricating the same, and mask device for fabrication of the same Feb. 27, 2001
6191466 Semiconductor device containing a diode Feb. 20, 2001
6165868 Monolithic device isolation by buried conducting walls Dec. 26, 2000
6157073 Isolation between power supplies of an analog-digital circuit Dec. 5, 2000
6153892 Semiconductor device and method for manufacture thereof Nov. 28, 2000
6150701 Insulative guard ring for a semiconductor device Nov. 21, 2000
6140690 Semiconductor device Oct. 31, 2000
6137142 MOS device structure and method for reducing PN junction leakage Oct. 24, 2000
6133597 Biasing an integrated circuit well with a transistor electrode Oct. 17, 2000
6110788 Surface channel MOS transistors, methods for making the same, and semiconductor devices containing the same Aug. 29, 2000
6107865 VSS switching scheme for battery backed-up semiconductor devices Aug. 22, 2000
6107672 Semiconductor device having a plurality of buried wells Aug. 22, 2000
6093620 Method of fabricating integrated circuits with oxidized isolation Jul. 25, 2000
6077746 Using p-type halo implant as ROM cell isolation in flat-cell mask ROM process Jun. 20, 2000
6075277 Power integrated circuit Jun. 13, 2000
6069059 Well-drive anneal technique using preplacement of nitride films for enhanced field isolation May. 30, 2000
6051868 Semiconductor device Apr. 18, 2000
6043687 Integrated circuit precision resistor ratio matching Mar. 28, 2000
6043522 Field effect transistor array including doped two-cell isolation region for preventing latchup Mar. 28, 2000
6029963 Semiconductor memory device having novel layout pattern Feb. 29, 2000
6030888 Method of fabricating high-voltage junction-isolated semiconductor devices Feb. 29, 2000
6028329 Bipolar junction transistor device and a method of fabricating the same Feb. 22, 2000
6020614 Method of reducing substrate noise coupling in mixed signal integrated circuits Feb. 1, 2000
6017778 Method for making power integrated circuit Jan. 25, 2000
6004864 Ion implant method for forming trench isolation for integrated circuit devices Dec. 21, 1999
5994190 Semiconductor device with impurity layer as channel stopper immediately under silicon oxide film Nov. 30, 1999
5994759 Semiconductor-on-insulator structure with reduced parasitic capacitance Nov. 30, 1999
5990535 Power integrated circuit Nov. 23, 1999
5981326 Damascene isolation of CMOS transistors Nov. 9, 1999
5972745 Method or forming self-aligned halo-isolated wells Oct. 26, 1999
5973366 High voltage integrated circuit Oct. 26, 1999
5949112 Integrated circuits with tub-ties Sep. 7, 1999
5943595 Method for manufacturing a semiconductor device having a triple-well structure Aug. 24, 1999
5937318 Monocrystalline three-dimensional integrated circuit Aug. 10, 1999
5926697 Method of forming a moisture guard ring for integrated circuit applications Jul. 20, 1999
5920107 Semiconductor integrated circuit device with high integration density Jul. 6, 1999
5900763 Circuit and method of reducing cross-talk in an integrated circuit substrate May. 4, 1999
5899714 Fabrication of semiconductor structure having two levels of buried regions May. 4, 1999

1 2 3 4 5 6 7 8 9 10 11

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