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Class Information
Number: 257/E21.539
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Processes or apparatus adapted for manufacture or treatment of semiconductor or solid-state devices or of parts thereof (epo) > Manufacture or treatment of devices consisting of plurality of solid-state components formed in or on common substrate or of parts thereof; manufacture of integrated circuit devices or of parts thereof (epo) > Manufacture of specific parts of devices (epo) > Making of localized buried regions, e.g., buried collector layer, internal connection, substrate contacts (epo) > For group iii-v compound semiconductor integrated circuits (epo)
Description: This subclass is indented under subclass E21.537. This subclass is substantially the same in scope as ECLA classification H01L21/74F.
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 8143147 |
Methods and systems for forming thin films |
Mar. 27, 2012 |
| 8035131 |
Method for forming a nitride semiconductor laminated structure and method for manufacturing a nitride semiconductor element |
Oct. 11, 2011 |
| 7727792 |
Laser diode epitaxial wafer and method for producing same |
Jun. 1, 2010 |
| 7700387 |
Method of fabricating optical device using multiple sacrificial spacer layers |
Apr. 20, 2010 |
| 7678593 |
Method of fabricating optical device using multiple sacrificial spacer layers |
Mar. 16, 2010 |
| 5672522 |
Method for making selective subcollector heterojunction bipolar transistors |
Sep. 30, 1997 |
| 5400354 |
Laminated upper cladding structure for a light-emitting device |
Mar. 21, 1995 |
| 5292686 |
Method of forming substrate vias in a GaAs wafer |
Mar. 8, 1994 |
| 5138407 |
Transistor made of 3-5 group semiconductor materials on a silicon substrate |
Aug. 11, 1992 |
| 4700467 |
Process for grounding flat devices and integrated circuits |
Oct. 20, 1987 |
| 3990093 |
Deep buried layers for semiconductor devices |
Nov. 2, 1976 |
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