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Class Information
Number: 257/E21.495
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Processes or apparatus adapted for manufacture or treatment of semiconductor or solid-state devices or of parts thereof (epo) > Manufacture or treatment of semiconductor device (epo) > Device having at least one potential-jump barrier or surface barrier, e.g., pn junction, depletion layer, carrier concentration layer (epo) > Device having semiconductor body other than carbon, si, ge, sic, se, te, cu 2 o, cui, and group iii-v compounds with or without impurities, e.g., doping materials (epo) > Treatment of semiconductor body using process other than electromagnetic radiation (epo) > To change their surface-physical characteristics or shape, e.g., etching, polishing, cutting (epo) > Deposition of noninsulating, e.g., conductive -, resistive -, layer on insulating layer (epo)
Description: This subclass is indented under subclass E21.483. This subclass is substantially the same in scope as ECLA classification H01L21/4763.

Sub-classes under this class:

Class Number Class Name Patents
257/E21.496 Post treatment of layer (epo) 18

Patents under this class:
1 2 3

Patent Number Title Of Patent Date Issued
8710494 Organic dual-gate memory and method for producing same Apr. 29, 2014
8673671 Methods and devices for fabricating tri-layer beams Mar. 18, 2014
8648442 Semiconductor device and method of manufacturing the same Feb. 11, 2014
8637113 Methods of forming a non-volatile resistive oxide memory array Jan. 28, 2014
8617975 Semiconductor processing methods Dec. 31, 2013
8592312 Method for depositing a conductive capping layer on metal lines Nov. 26, 2013
8563421 Method of fabricating semiconductor device Oct. 22, 2013
8536058 Method of growing electrical conductors Sep. 17, 2013
8531003 Semiconductor device and manufacturing method of the same Sep. 10, 2013
8518817 Method of electrolytic plating and semiconductor device fabrication Aug. 27, 2013
8470681 Resistor with improved switchable resistance and non-volatile memory device Jun. 25, 2013
8426973 Integrated circuit of decreased size Apr. 23, 2013
8415249 Method of manufacturing semiconductor device Apr. 9, 2013
8405215 Interconnect structure and method for Cu/ultra low k integration Mar. 26, 2013
8377822 Semiconductor device and manufacturing method thereof Feb. 19, 2013
8367451 Method and structures for fabricating MEMS devices on compliant layers Feb. 5, 2013
8361849 Method of fabricating semiconductor device Jan. 29, 2013
8350365 Mitigation of well proximity effect in integrated circuits Jan. 8, 2013
8344477 Semiconductor chip, semiconductor wafer, method of manufacturing semiconductor chip Jan. 1, 2013
8318602 Nonvolatile semiconductor storage apparatus and method for manufacturing the same Nov. 27, 2012
8309459 Semiconductor process Nov. 13, 2012
8309457 Multilayer low reflectivity hard mask and process therefor Nov. 13, 2012
8309454 Structure for electrostatic discharge in embedded wafer level packages Nov. 13, 2012
8298890 Charge blocking layers for nonvolatile memories Oct. 30, 2012
8268721 Semiconductor device and semiconductor device manufacturing method Sep. 18, 2012
8247322 Via/contact and damascene structures and manufacturing methods thereof Aug. 21, 2012
8242016 Approach for reducing copper line resistivity Aug. 14, 2012
8227872 Heterojunction diode, method of manufacturing the same, and electronic device including the heterojunction diode Jul. 24, 2012
8211787 Semiconductor processing methods Jul. 3, 2012
8211794 Properties of metallic copper diffusion barriers through silicon surface treatments Jul. 3, 2012
8198190 Semiconductor device and method for patterning vertical contacts and metal lines in a common etch process Jun. 12, 2012
8178437 Barrier material and process for Cu interconnect May. 15, 2012
8129264 Method of fabricating a semiconductor device Mar. 6, 2012
8124517 Method of forming an interconnect joint Feb. 28, 2012
8114468 Methods of forming a non-volatile resistive oxide memory array Feb. 14, 2012
8101512 Method of enhancing lithography capabilities during gate formation in semiconductors having a pronounced surface topography Jan. 24, 2012
8084759 Integrated circuit including doped semiconductor line having conductive cladding Dec. 27, 2011
8080461 Method of making a thin film resistor Dec. 20, 2011
8076780 Semiconductor device with pads of enhanced moisture blocking ability Dec. 13, 2011
8048797 Multilayer low reflectivity hard mask and process therefor Nov. 1, 2011
8039395 Technique for forming embedded metal lines having increased resistance against stress-induced material transport Oct. 18, 2011
8034655 Non-volatile resistive oxide memory cells, non-volatile resistive oxide memory arrays, and methods of forming non-volatile resistive oxide memory cells and memory arrays Oct. 11, 2011
8030778 Integrated circuit structure and manufacturing method thereof Oct. 4, 2011
8018061 Integrated circuit hard mask processing system Sep. 13, 2011
8008178 Method for fabricating semiconductor device with an intermediate stack structure Aug. 30, 2011
8003514 Methods of fabricating semiconductor devices including storage node landing pads separated from bit line contact plugs Aug. 23, 2011
8004087 Semiconductor device with dual damascene wirings and method for manufacturing same Aug. 23, 2011
7994639 Microelectronic structure including dual damascene structure and high contrast alignment mark Aug. 9, 2011
7977793 Metal line of semiconductor device having a diffusion barrier with an amorphous TaBN layer and method for forming the same Jul. 12, 2011
7968461 Method for forming wiring, method for manufacturing thin film transistor and droplet discharging method Jun. 28, 2011

1 2 3

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