Resources Contact Us Home
Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
Browse by Category: Main > Physics
Class Information
Number: 257/E21.469
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Processes or apparatus adapted for manufacture or treatment of semiconductor or solid-state devices or of parts thereof (epo) > Manufacture or treatment of semiconductor device (epo) > Device having at least one potential-jump barrier or surface barrier, e.g., pn junction, depletion layer, carrier concentration layer (epo) > Device having semiconductor body other than carbon, si, ge, sic, se, te, cu 2 o, cui, and group iii-v compounds with or without impurities, e.g., doping materials (epo) > Diffusion of impurity material, e.g., dopant, electrode material, into or out of semiconductor body, or between semiconductor regions (epo) > Using diffusion into or out of solid from or into liquid phase, e.g., alloy diffusion process (epo)
Description: This subclass is indented under subclass E21.466. This subclass is substantially the same in scope as ECLA classification H01L21/388.










Patents under this class:

Patent Number Title Of Patent Date Issued
8691685 Prevention and control of intermetallic alloy inclusions that form during reflow of Pb free, Sn rich, solders in contacts in microelectronic packaging in integrated circuit contact structures Apr. 8, 2014
8679964 Prevention and control of intermetallic alloy inclusions Mar. 25, 2014
8440017 Method for growing group 13 nitride crystal and group 13 nitride crystal May. 14, 2013
8163638 Back side contact solar cell structures and fabrication processes Apr. 24, 2012
RE41538 Method for making integrated circuit including interconnects with enhanced electromigration resistance using doped seed layer and integrated circuits produced thereby Aug. 17, 2010
6114738 Intrinsic p-type HgCdTe using CdTe capping layer Sep. 5, 2000
6030853 Method of producing intrinsic p-type HgCdTe using CdTe capping layer Feb. 29, 2000
4927784 Simultaneous formation of via hole and tube structures for GaAs monolithic microwave integrated circuits May. 22, 1990
4807022 Simultaneous formation of via hole and tub structures for GaAs monolithic microwave integrated circuits Feb. 21, 1989
4684415 Core annihilation method of Hg.sub.1-x Cd.sub.x Te Aug. 4, 1987
4219369 Method of making semiconductor integrated circuit device Aug. 26, 1980
4089713 Diffusion of donors into (Hg Cd) Te through use of Ga-Al alloy May. 16, 1978
4087294 Lithium doped mercury cadmium telluride May. 2, 1978











 
 
  Recently Added Patents
Linked area parameter adjustment for spinal cord stimulation and associated systems and methods
Real-image zoom viewfinder and imaging apparatus
Semiconductor device and method of forming interconnect structure with conductive pads having expanded interconnect surface area for enhanced interconnection properties
Aisle barrier
Methods of establishing virtual circuits and of providing a virtual private network service through a shared network, and provider edge device for such network
Termite tubing preventative for non-wood materials
Knee guard
  Randomly Featured Patents
Plasmids for plant transformation and method for using the same
Method and apparatus for reducing power dissipation in multi-carrier amplifiers
Bathroom accessory with integrated toothpaste dispenser, toothbrush hanger, and soap holder
Nucleic acid sequence for potentiating the expression of useful gene and method therefor
Calorimetric flow meter having high heat conductivity strips
Manufacturing method of mechanical pulp from cornstalk cellulose
Seal with two sealing rings
Adjustable lumbar support
Axial flow fan
Vertical cable management system with ribcage structure