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Class Information
Number: 257/E21.444
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Processes or apparatus adapted for manufacture or treatment of semiconductor or solid-state devices or of parts thereof (epo) > Manufacture or treatment of semiconductor device (epo) > Device having at least one potential-jump barrier or surface barrier, e.g., pn junction, depletion layer, carrier concentration layer (epo) > Device having semiconductor body comprising group iv elements or group iii-v compounds with or without impurities, e.g., doping materials (epo) > Multi-step process for the manufacture of unipolar device (epo) > Field-effect transistor (epo) > With an insulated gate (epo) > Using dummy gate wherein at least part of final gate is self-aligned to dummy gate (epo)
Description: This subclass is indented under subclass E21.409. This subclass is substantially the same in scope as ECLA classification H01L21/336U.

Patents under this class:
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16

Patent Number Title Of Patent Date Issued
8685823 Nanowire field effect transistor device Apr. 1, 2014
8679909 Recessing and capping of gate structures with varying metal compositions Mar. 25, 2014
8679923 Method for forming metal gate Mar. 25, 2014
8673708 Replacement gate ETSOI with sharp junction Mar. 18, 2014
8669159 Devices with cavity-defined gates and methods of making the same Mar. 11, 2014
8659066 Integrated circuit with a thin body field effect transistor and capacitor Feb. 25, 2014
8652898 Integrated circuit with a thin body field effect transistor and capacitor Feb. 18, 2014
8629021 Integration scheme for an NMOS metal gate Jan. 14, 2014
8592265 Method for manufacturing semiconductor device having a metal gate electrode Nov. 26, 2013
8580641 Techniques providing high-k dielectric metal gate CMOS Nov. 12, 2013
8569140 Method of fabricating semiconductor device Oct. 29, 2013
8557655 Semiconductor device and method of manufacturing the same Oct. 15, 2013
8546209 Replacement metal gate processing with reduced interlevel dielectric layer etch rate Oct. 1, 2013
8541835 Schottky FET fabricated with gate last process Sep. 24, 2013
8535998 Method for fabricating a gate structure Sep. 17, 2013
8536651 Multi-gate transistor having sidewall contacts Sep. 17, 2013
8530317 Corner rounding to improve metal fill in replacement gate process Sep. 10, 2013
8524564 Full silicidation prevention via dual nickel deposition approach Sep. 3, 2013
8525270 Structures and methods to stop contact metal from extruding into replacement gates Sep. 3, 2013
8518781 Semiconductor device and manufacturing method thereof Aug. 27, 2013
8507338 Semiconductor structure and fabricating method thereof Aug. 13, 2013
8492812 Semiconductor device having dummy pattern and method of fabricating a semiconductor device comprising dummy pattern Jul. 23, 2013
8470661 High-K gate electrode structure formed after transistor fabrication by using a spacer Jun. 25, 2013
8445345 CMOS structure having multiple threshold voltage devices May. 21, 2013
8420469 Schottky FET fabricated with gate last process Apr. 16, 2013
8420470 Method of fabricating a semiconductor device using compressive material with a replacement gate technique Apr. 16, 2013
8420486 Method for manufacturing semiconductor device Apr. 16, 2013
8423942 Fill patterning for symmetrical circuits Apr. 16, 2013
8404530 Replacement metal gate with a conductive metal oxynitride layer Mar. 26, 2013
8384166 Method for manufacturing semiconductor device and semiconductor device Feb. 26, 2013
8383473 Methods of forming replacement gate structures for semiconductor devices Feb. 26, 2013
8368128 Compact field effect transistor with counter-electrode and fabrication method Feb. 5, 2013
8368136 Integrating a capacitor in a metal gate last process Feb. 5, 2013
8354313 Method to optimize work function in complementary metal oxide semiconductor (CMOS) structures Jan. 15, 2013
8343837 Work function adjustment in a high-k gate electrode structure after transistor fabrication by using lanthanum Jan. 1, 2013
8338256 Multi-gate transistor having sidewall contacts Dec. 25, 2012
8334198 Method of fabricating a plurality of gate structures Dec. 18, 2012
8334184 Polish to remove topography in sacrificial gate layer prior to gate patterning Dec. 18, 2012
8319257 Semiconductor device and layout design method therefor Nov. 27, 2012
8313991 Method for fabricating a high-K metal gate MOS Nov. 20, 2012
8288262 Method for fabricating semiconductor device Oct. 16, 2012
8283232 Enhanced etch stop capability during patterning of silicon nitride including layer stacks by providing a chemically formed oxide layer during semiconductor processing Oct. 9, 2012
8273626 Nonplanar semiconductor device with partially or fully wrapped around gate electrode and methods of fabrication Sep. 25, 2012
8227853 Semiconductor integrated circuit devices having conductive patterns that are electrically connected to junction regions Jul. 24, 2012
8211775 Method of making transistor having metal gate Jul. 3, 2012
8202799 Methods of manufacturing metal-silicide features Jun. 19, 2012
8198152 Transistors comprising high-k metal gate electrode structures and adapted channel semiconductor materials Jun. 12, 2012
8153492 Self-aligned V-channel MOSFET Apr. 10, 2012
8138038 Superior fill conditions in a replacement gate approach by performing a polishing process based on a sacrificial fill material Mar. 20, 2012
8125051 Device layout for gate last process Feb. 28, 2012

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