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Class Information
Number: 257/E21.443
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Processes or apparatus adapted for manufacture or treatment of semiconductor or solid-state devices or of parts thereof (epo) > Manufacture or treatment of semiconductor device (epo) > Device having at least one potential-jump barrier or surface barrier, e.g., pn junction, depletion layer, carrier concentration layer (epo) > Device having semiconductor body comprising group iv elements or group iii-v compounds with or without impurities, e.g., doping materials (epo) > Multi-step process for the manufacture of unipolar device (epo) > Field-effect transistor (epo) > With an insulated gate (epo) > Using self-aligned punch through stopper or threshold implant under gate region (epo)
Description: This subclass is indented under subclass E21.409. This subclass is substantially the same in scope as ECLA classification H01L21/336T.










Patents under this class:
1 2 3 4 5

Patent Number Title Of Patent Date Issued
8652911 Semiconductor device and method of manufacturing the same Feb. 18, 2014
8643117 Semiconductor device, method for manufacturing same, and semiconductor storage device Feb. 4, 2014
8513081 Carbon implant for workfunction adjustment in replacement gate transistor Aug. 20, 2013
8399953 Semiconductor device and method for manufacturing the same Mar. 19, 2013
8377783 Method for reducing punch-through in a transistor device Feb. 19, 2013
8318570 Enhancing MOSFET performance by optimizing stress properties Nov. 27, 2012
8298895 Selective threshold voltage implants for long channel devices Oct. 30, 2012
8154077 Semiconductor device Apr. 10, 2012
8110897 Semiconductor device with carbon-containing region Feb. 7, 2012
7998823 Method for reducing leakage currents caused by misalignment of a contact structure by increasing an error tolerance of the contact patterning process Aug. 16, 2011
7943468 Penetrating implant for forming a semiconductor device May. 17, 2011
7939898 Diffusion variability control and transistor device sizing using threshold voltage implant May. 10, 2011
7932153 Semiconductor device and method for fabricating the same Apr. 26, 2011
7842572 Methods of manufacturing semiconductor devices with local recess channel transistors Nov. 30, 2010
7772063 Reduced-step CMOS processes for low-cost radio frequency identification devices Aug. 10, 2010
7645662 Transistor providing different threshold voltages and method of fabrication thereof Jan. 12, 2010
7622777 Semiconductor device and method for fabricating the same Nov. 24, 2009
7598146 Self-aligned gate and method Oct. 6, 2009
7592241 Semiconductor device having well with peak impurity concentrations and method for fabricating the same Sep. 22, 2009
7557022 Implantation of carbon and/or fluorine in NMOS fabrication Jul. 7, 2009
7534677 Method of fabricating a dual gate oxide May. 19, 2009
7521342 Semiconductor structure with high-voltage sustaining capability and fabrication method of the same Apr. 21, 2009
7488653 Semiconductor device and method for implantation of doping agents in a channel Feb. 10, 2009
7402494 Method for fabricating high voltage semiconductor device Jul. 22, 2008
7279767 Semiconductor structure with high-voltage sustaining capability and fabrication method of the same Oct. 9, 2007
7268033 Method and structure for providing tuned leakage current in CMOS integrated circuits Sep. 11, 2007
7179714 Method of fabricating MOS transistor having fully silicided gate Feb. 20, 2007
7166506 Poly open polish process Jan. 23, 2007
7119405 Implantation method to improve ESD robustness of thick gate-oxide grounded-gate NMOSFET's in deep-submicron CMOS technologies Oct. 10, 2006
7067880 Transistor gate structure Jun. 27, 2006
7045449 Methods of forming semiconductor constructions May. 16, 2006
7038270 Nonvolatile memory device with a non-planar gate-insulating layer and method of fabricating the same May. 2, 2006
7038258 Semiconductor device having a localized halo implant therein and method of manufacture therefor May. 2, 2006
7026202 Inverse-T gate structure using damascene processing Apr. 11, 2006
6998318 Method for forming short-channel transistors Feb. 14, 2006
6998302 Method of manufacturing mosfet having a fine gate width with improvement of short channel effect Feb. 14, 2006
6989316 Semiconductor device and method for manufacturing Jan. 24, 2006
6987049 Semiconductor transistors and methods of fabricating the same Jan. 17, 2006
6974743 Method of making encapsulated spacers in vertical pass gate DRAM and damascene logic gates Dec. 13, 2005
6951785 Methods of forming field effect transistors including raised source/drain regions Oct. 4, 2005
6946353 Low voltage high performance semiconductor devices and methods Sep. 20, 2005
6940135 Mask-ROM process and device to prevent punch through using a halo implant process Sep. 6, 2005
6936517 Method for fabricating transistor of semiconductor device Aug. 30, 2005
6916694 Strained silicon-channel MOSFET using a damascene gate process Jul. 12, 2005
6897526 Semiconductor device and process for producing the same May. 24, 2005
6897117 Method of manufacturing semiconductor device May. 24, 2005
6875680 Methods of manufacturing transistors using dummy gate patterns Apr. 5, 2005
6852599 Method for fabricating MOS transistors Feb. 8, 2005
6844602 Semiconductor device, and method for manufacturing the same Jan. 18, 2005
6838326 Semiconductor device, and method for manufacturing the same Jan. 4, 2005

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