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Class Information
Number: 257/E21.44
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Processes or apparatus adapted for manufacture or treatment of semiconductor or solid-state devices or of parts thereof (epo) > Manufacture or treatment of semiconductor device (epo) > Device having at least one potential-jump barrier or surface barrier, e.g., pn junction, depletion layer, carrier concentration layer (epo) > Device having semiconductor body comprising group iv elements or group iii-v compounds with or without impurities, e.g., doping materials (epo) > Multi-step process for the manufacture of unipolar device (epo) > Field-effect transistor (epo) > With an insulated gate (epo) > Using self-aligned selective metal deposition simultaneously on gate and on source or drain (epo)
Description: This subclass is indented under subclass E21.409. This subclass is substantially the same in scope as ECLA classification H01L21/336N.


Patents under this class:

Patent Number Title Of Patent Date Issued
7582554 Method for manufacturing semiconductor device Sep. 1, 2009
7553749 Method of hiding transparent electrodes on a transparent substrate Jun. 30, 2009
7504296 Semiconductor memory device and method for fabricating the same Mar. 17, 2009
7479682 Structure of a field effect transistor having metallic silicide and manufacturing method thereof Jan. 20, 2009
7427569 Metal etching process and rework method thereof Sep. 23, 2008
7298013 Compound used to form a self-assembled monolayer, layer structure, semiconductor component having a layer structure, and method for producing a layer structure Nov. 20, 2007
7265048 Reduction of copper dewetting by transition metal deposition Sep. 4, 2007
7244996 Structure of a field effect transistor having metallic silicide and manufacturing method thereof Jul. 17, 2007
7192825 Semiconductor memory device and method for fabricating the same Mar. 20, 2007
7144788 Method for manufacturing a transmitting optical sub-assembly with a thermo-electric cooler therein Dec. 5, 2006
6956276 Semiconductor device with an L-shaped/reversed L-shaped gate side-wall insulating film Oct. 18, 2005
6917085 Semiconductor transistor using L-shaped spacer Jul. 12, 2005
6881633 Method of manufacturing a semiconductor device with an L-shaped/reversed L-shaped gate side-wall insulating film Apr. 19, 2005
6777759 Device structure and method for reducing silicide encroachment Aug. 17, 2004
6765273 Device structure and method for reducing silicide encroachment Jul. 20, 2004
6693013 Semiconductor transistor using L-shaped spacer and method of fabricating the same Feb. 17, 2004
6573583 Semiconductor device and method of manufacturing the same Jun. 3, 2003
6518155 Device structure and method for reducing silicide encroachment Feb. 11, 2003
6436754 Selective salicide process by reformation of silicon nitride sidewall spacers Aug. 20, 2002
6376885 Semiconductor structure with metal silicide and method for fabricated the structure Apr. 23, 2002
6287967 Self-aligned silicide process Sep. 11, 2001
6258648 Selective salicide process by reformation of silicon nitride sidewall spacers Jul. 10, 2001
6180469 Low resistance salicide technology with reduced silicon consumption Jan. 30, 2001
6140232 Method for reducing silicide resistance Oct. 31, 2000
6110811 Selective CVD TiSi.sub.2 deposition with TiSi.sub.2 liner Aug. 29, 2000
6049131 Device formed by selective deposition of refractory metal of less than 300 Angstroms of thickness Apr. 11, 2000
6037233 Metal-encapsulated polysilicon gate and interconnect Mar. 14, 2000
5973372 Silicided shallow junction transistor formation and structure with high and low breakdown voltages Oct. 26, 1999
5937300 Semiconductor apparatus and fabrication method thereof Aug. 10, 1999
5876796 Process for selectively depositing a refractory metal silicide on silicon, and silicon wafer metallized using this process Mar. 2, 1999
5841173 MOS semiconductor device with excellent drain current Nov. 24, 1998
5807788 Method for selective deposition of refractory metal and device formed thereby Sep. 15, 1998
5783479 Structure and method for manufacturing improved FETs having T-shaped gates Jul. 21, 1998
5776835 Method of making a grooved gate structure of semiconductor device Jul. 7, 1998
5714398 Self-aligned tungsten strapped source/drain and gate technology for deep submicron CMOS Feb. 3, 1998
5300455 Process for producing an electrically conductive diffusion barrier at the metal/silicon interface of a MOS transistor Apr. 5, 1994
4616401 Method of fabricating an insulated gate type field-effect transistor Oct. 14, 1986
4510670 Method for the manufacture of integrated MOS-field effect transistor circuits silicon gate technology having diffusion zones coated with silicide as low-impedance printed conductors Apr. 16, 1985



 
 
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