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Class Information
Number: 257/E21.438
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Processes or apparatus adapted for manufacture or treatment of semiconductor or solid-state devices or of parts thereof (epo) > Manufacture or treatment of semiconductor device (epo) > Device having at least one potential-jump barrier or surface barrier, e.g., pn junction, depletion layer, carrier concentration layer (epo) > Device having semiconductor body comprising group iv elements or group iii-v compounds with or without impurities, e.g., doping materials (epo) > Multi-step process for the manufacture of unipolar device (epo) > Field-effect transistor (epo) > With an insulated gate (epo) > Using self-aligned silicidation, i.e., salicide (epo)
Description: This subclass is indented under subclass E21.409. This subclass is substantially the same in scope as ECLA classification H01L21/336M.
Sub-classes under this class:
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7618891 |
Method for forming self-aligned metal silicide contacts |
Nov. 17, 2009 |
| 7618855 |
Manufacturing method of semiconductor device |
Nov. 17, 2009 |
| 7595264 |
Fabrication method of semiconductor device |
Sep. 29, 2009 |
| 7595234 |
Fabricating method for a metal oxide semiconductor transistor |
Sep. 29, 2009 |
| 7585738 |
Method of forming a fully silicided semiconductor device with independent gate and source/drain doping and related device |
Sep. 8, 2009 |
| 7582563 |
Method for fabricating fully silicided gate |
Sep. 1, 2009 |
| 7575989 |
Method of manufacturing a transistor of a semiconductor device |
Aug. 18, 2009 |
| 7560379 |
Semiconductive device fabricated using a raised layer to silicide the gate |
Jul. 14, 2009 |
| 7553763 |
Salicide process utilizing a cluster ion implantation process |
Jun. 30, 2009 |
| 7550396 |
Method for reducing resist poisoning during patterning of silicon nitride layers in a semiconductor device |
Jun. 23, 2009 |
| 7547608 |
Polysilicon hard mask for enhanced alignment signal |
Jun. 16, 2009 |
| 7544616 |
Methods of forming nitride read only memory and word lines thereof |
Jun. 9, 2009 |
| 7544575 |
Dual metal silicide scheme using a dual spacer process |
Jun. 9, 2009 |
| 7538002 |
Semiconductor process integrating source/drain stressors and interlevel dielectric layer stressors |
May. 26, 2009 |
| 7534689 |
Stress enhanced MOS transistor and methods for its fabrication |
May. 19, 2009 |
| 7485572 |
Method for improved formation of cobalt silicide contacts in semiconductor devices |
Feb. 3, 2009 |
| 7482270 |
Fully and uniformly silicided gate structure and method for forming same |
Jan. 27, 2009 |
| 7479682 |
Structure of a field effect transistor having metallic silicide and manufacturing method thereof |
Jan. 20, 2009 |
| 7476617 |
Semiconductor device with epitaxial C49-titanium silicide (TiSi.sub.2) layer and method for fabricating the same |
Jan. 13, 2009 |
| 7476577 |
Semiconductor device and method of fabricating the same |
Jan. 13, 2009 |
| 7473627 |
Semiconducting device having a structure to improve contact processing margin, and method of fabricating the same |
Jan. 6, 2009 |
| 7465976 |
Tunneling field effect transistor using angled implants for forming asymmetric source/drain regions |
Dec. 16, 2008 |
| 7465634 |
Method of forming integrated circuit devices having n-MOSFET and p-MOSFET transistors with elevated and silicided source/drain structures |
Dec. 16, 2008 |
| 7446008 |
Method for fabricating silicide layers for semiconductor device |
Nov. 4, 2008 |
| 7435669 |
Method of fabricating transistor in semiconductor device |
Oct. 14, 2008 |
| 7432180 |
Method of fabricating a nickel silicide layer by conducting a thermal annealing process in a silane gas |
Oct. 7, 2008 |
| 7429525 |
Fabrication process of a semiconductor device |
Sep. 30, 2008 |
| 7422942 |
Method for fabricating a semiconductor device having an insulation film with reduced water content |
Sep. 9, 2008 |
| 7402520 |
Edge removal of silicon-on-insulator transfer wafer |
Jul. 22, 2008 |
| 7396764 |
Manufacturing method for forming all regions of the gate electrode silicided |
Jul. 8, 2008 |
| 7384852 |
Sub-lithographic gate length transistor using self-assembling polymers |
Jun. 10, 2008 |
| 7371599 |
Image sensor and method of forming the same |
May. 13, 2008 |
| 7368363 |
Method of manufacturing semiconductor device and method of treating semiconductor surface |
May. 6, 2008 |
| 7364995 |
Method of forming reduced short channel field effect transistor |
Apr. 29, 2008 |
| 7348248 |
CMOS transistor with high drive current and low sheet resistance |
Mar. 25, 2008 |
| 7344984 |
Technique for enhancing stress transfer into channel regions of NMOS and PMOS transistors |
Mar. 18, 2008 |
| 7344932 |
Use of silicon block process step to camouflage a false transistor |
Mar. 18, 2008 |
| 7320939 |
Semiconductor device fabricated by a method of reducing the contact resistance of the connection regions |
Jan. 22, 2008 |
| 7309649 |
Method of forming closed air gap interconnects and structures formed thereby |
Dec. 18, 2007 |
| 7309637 |
Method to enhance device performance with selective stress relief |
Dec. 18, 2007 |
| 7256096 |
Semiconductor device having a dual-damascene gate and manufacturing method thereof |
Aug. 14, 2007 |
| 7244996 |
Structure of a field effect transistor having metallic silicide and manufacturing method thereof |
Jul. 17, 2007 |
| 7223662 |
Method of forming an epitaxial layer for raised drain and source regions by removing surface defects of the initial crystal surface |
May. 29, 2007 |
| 7220632 |
Method of forming a semiconductor device and an optical device and structure thereof |
May. 22, 2007 |
| 7220623 |
Method for manufacturing silicide and semiconductor with the silicide |
May. 22, 2007 |
| 7217633 |
Methods for fabricating an STI film of a semiconductor device |
May. 15, 2007 |
| 7217624 |
Non-volatile memory device with conductive sidewall spacer and method for fabricating the same |
May. 15, 2007 |
| 7211515 |
Methods of forming silicide layers on source/drain regions of MOS transistors |
May. 1, 2007 |
| 7211491 |
Method of fabricating gate electrode of semiconductor device |
May. 1, 2007 |
| 7183169 |
Method and arrangement for reducing source/drain resistance with epitaxial growth |
Feb. 27, 2007 |
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