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Class Information
Number: 257/E21.422
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Processes or apparatus adapted for manufacture or treatment of semiconductor or solid-state devices or of parts thereof (epo) > Manufacture or treatment of semiconductor device (epo) > Device having at least one potential-jump barrier or surface barrier, e.g., pn junction, depletion layer, carrier concentration layer (epo) > Device having semiconductor body comprising group iv elements or group iii-v compounds with or without impurities, e.g., doping materials (epo) > Multi-step process for the manufacture of unipolar device (epo) > Field-effect transistor (epo) > With an insulated gate (epo) > With floating gate (epo)
Description: This subclass is indented under subclass E21.409. This subclass is substantially the same in scope as ECLA classification H01L21/336F.










Patents under this class:
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Patent Number Title Of Patent Date Issued
5840607 Method of forming undoped/in-situ doped/undoped polysilicon sandwich for floating gate application Nov. 24, 1998
5841162 Non-volatile semiconductor memory with floating gate and control gate and fabrication process therefor Nov. 24, 1998
5837583 Method of forming separated floating gate for EEPROM application Nov. 17, 1998
5837585 Method of fabricating flash memory cell Nov. 17, 1998
5838039 Semiconductor memory having a tunneling region Nov. 17, 1998
5834793 Semiconductor devices Nov. 10, 1998
5834808 Non-volatile semiconductor memory device Nov. 10, 1998
5831304 Semiconductor memory device that converges a floating gate threshold voltage to a predetermined positive value during data erasure Nov. 3, 1998
5825062 Semiconductor device including a nonvolatile memory Oct. 20, 1998
5817557 Process of fabricating tunnel-oxide nonvolatile memory devices Oct. 6, 1998
5818082 E.sup.2 PROM device having erase gate in oxide isolation region in shallow trench and method of manufacture thereof Oct. 6, 1998
5811334 Wafer cleaning procedure useful in the manufacture of a non-volatile memory device Sep. 22, 1998
5805013 Non-volatile memory device having a floating gate with enhanced charge retention Sep. 8, 1998
5801076 Method of making non-volatile memory device having a floating gate with enhanced charge retention Sep. 1, 1998
5798548 Semiconductor device having multiple control gates Aug. 25, 1998
5798279 Method of fabricating non-volatile memories with overlapping layers Aug. 25, 1998
5793080 Nonvolatile memory device Aug. 11, 1998
5789295 Method of eliminating or reducing poly1 oxidation at stacked gate edge in flash EPROM process Aug. 4, 1998
5789296 Method for manufacturing split gate flash memory Aug. 4, 1998
5786614 Separated floating gate for EEPROM application Jul. 28, 1998
5783457 Method of making a flash memory cell having an asymmetric source and drain pocket structure Jul. 21, 1998
5783473 Structure and manufacturing process of a split gate flash memory unit Jul. 21, 1998
5780341 Low voltage EEPROM/NVRAM transistors and making method Jul. 14, 1998
5776787 Spacer flash cell process Jul. 7, 1998
5776811 Simplified process for fabricating flash eeprom cells Jul. 7, 1998
5766997 Method of forming floating gate type non-volatile semiconductor memory device having silicided source and drain regions Jun. 16, 1998
5767005 Method for fabricating a flash EEPROM Jun. 16, 1998
5763913 Flash memory device with improved efficiency and reliability and method of making the same Jun. 9, 1998
5759896 Process for fabricating memory cells of flash memory Jun. 2, 1998
5760435 Use of spacers as floating gates in EEPROM with doubled storage efficiency Jun. 2, 1998
5756384 Method of fabricating an EPROM cell with a high coupling ratio May. 26, 1998
5753954 Single-poly neuron MOS transistor May. 19, 1998
5750428 Self-aligned non-volatile process with differentially grown gate oxide thickness May. 12, 1998
5747370 Method of manufacturing a non-volatile semiconductor device May. 5, 1998
5740103 Electrically programmable memory cell Apr. 14, 1998
5736765 EEPROM cell having improved topology and reduced leakage current Apr. 7, 1998
5731237 Method of producing an EPROM with a trench insulating layer Mar. 24, 1998
5726070 Silicon-rich tunnel oxide formed by oxygen implantation for flash EEPROM Mar. 10, 1998
5726471 Programmable non-volatile memory cell and method of forming a programmable non-volatile memory cell Mar. 10, 1998
5721442 High density flash EPROM Feb. 24, 1998
5716865 Method of making split gate flash EEPROM cell by separating the tunneling region from the channel Feb. 10, 1998
5716874 Method of fabricating EPROM memory by individually forming gate oxide and coupling insulator Feb. 10, 1998
5714412 Multi-level, split-gate, flash memory cell and method of manufacture thereof Feb. 3, 1998
5714766 Nano-structure memory device Feb. 3, 1998
5715196 Method for driving a non-volatile semiconductor memory Feb. 3, 1998
5712814 Nonvolatile memory cell and a method for forming the same Jan. 27, 1998
5707898 Method of forming a programmable non-volatile memory cell by providing a shielding layer over the gate sidewalls Jan. 13, 1998
5702965 Flash memory cell and method of making the same Dec. 30, 1997
5691552 Nonvolatile semiconductor memory formed with silicon-on-insulator structure Nov. 25, 1997
5691560 Nonvolatile semiconductor memory device and method of manufacturing the same Nov. 25, 1997

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