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Class Information
Number: 257/E21.422
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Processes or apparatus adapted for manufacture or treatment of semiconductor or solid-state devices or of parts thereof (epo) > Manufacture or treatment of semiconductor device (epo) > Device having at least one potential-jump barrier or surface barrier, e.g., pn junction, depletion layer, carrier concentration layer (epo) > Device having semiconductor body comprising group iv elements or group iii-v compounds with or without impurities, e.g., doping materials (epo) > Multi-step process for the manufacture of unipolar device (epo) > Field-effect transistor (epo) > With an insulated gate (epo) > With floating gate (epo)
Description: This subclass is indented under subclass E21.409. This subclass is substantially the same in scope as ECLA classification H01L21/336F.

Patents under this class:
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Patent Number Title Of Patent Date Issued
6143609 Method for forming semiconductor memory device Nov. 7, 2000
6140688 Semiconductor device with self-aligned metal-containing gate Oct. 31, 2000
6136649 Method for removing anti-reflective coating layer using plasma etch process after contact CMP Oct. 24, 2000
6130130 Semiconductor device and a method for manufacturing thereof Oct. 10, 2000
6130131 Method for fabricating a flash memory Oct. 10, 2000
6130134 Method for forming asymmetric flash EEPROM with a pocket to focus electron injections Oct. 10, 2000
6130453 Flash memory structure with floating gate in vertical trench Oct. 10, 2000
6130839 Methods of programming, erasing and reading a flash memory Oct. 10, 2000
6127222 Non-self-aligned side channel implants for flash memory cells Oct. 3, 2000
6127698 High density/speed nonvolatile memories with a textured tunnel oxide and a high capacitive-coupling ratio Oct. 3, 2000
6124168 Method for forming an asymmetric floating gate overlap for improved device performance in buried bit-line devices Sep. 26, 2000
6121088 Method of manufacture of undoped polysilicon as the floating-gate of a split-gate flash cell Sep. 19, 2000
6121655 Nonvolatile semiconductor memory device and method for fabricating the same and semiconductor integrated circuit Sep. 19, 2000
6117731 Method of forming high capacitive-coupling ratio and high speed flash memories with a textured tunnel oxide Sep. 12, 2000
6117732 Use of a metal contact structure to increase control gate coupling capacitance for a single polysilicon non-volatile memory cell Sep. 12, 2000
6117756 Method of forming high density and low power flash memories with a high capacitive-coupling ratio Sep. 12, 2000
6110780 Using NO or N.sub.2 O treatment to generate different oxide thicknesses in one oxidation step for single poly non-volatile memory Aug. 29, 2000
6107141 Flash EEPROM Aug. 22, 2000
6103573 Processing techniques for making a dual floating gate EEPROM cell array Aug. 15, 2000
6096605 Fabricating method of non-volatile flash memory device Aug. 1, 2000
6093604 Method of manufacturing a flash memory device Jul. 25, 2000
6091101 Multi-level flash memory using triple well Jul. 18, 2000
6091644 Structure of a channel write/erase flash memory cell Jul. 18, 2000
6087219 Highly reliable flash memory structure with halo source Jul. 11, 2000
6087237 Method of manufacturing a MOSFET by forming a single oxide layer doping with either an oxide accelerator or an oxide inhibitor producing asymmetric thickness Jul. 11, 2000
6078076 Vertical channels in split-gate flash memory cell Jun. 20, 2000
6074914 Integration method for sidewall split gate flash transistor Jun. 13, 2000
6075261 Neutron detecting semiconductor device Jun. 13, 2000
6071777 Method for a self-aligned select gate for a split-gate flash memory structure Jun. 6, 2000
6069040 Fabricating a floating gate with field enhancement feature self-aligned to a groove May. 30, 2000
6069042 Multi-layer spacer technology for flash EEPROM May. 30, 2000
6063664 Method of making EEPROM with trenched structure May. 16, 2000
6060358 Damascene NVRAM cell and method of manufacture May. 9, 2000
6060360 Method of manufacture of P-channel EEprom and flash EEprom devices May. 9, 2000
6060766 Protection of hydrogen sensitive regions in semiconductor devices from the positive charge associated with plasma deposited barriers or layers May. 9, 2000
6054350 EPROM cell having a gate structure with sidewall spacers of differential composition Apr. 25, 2000
6054733 Method for fabricating a flash EEPROM Apr. 25, 2000
6051465 Method for fabricating nonvolatile semiconductor memory device Apr. 18, 2000
6051510 Method of using a hard mask to grow dielectrics with varying characteristics Apr. 18, 2000
6051860 Nonvolatile semiconductor memory device and method for fabricating the same and semiconductor integrated circuit Apr. 18, 2000
6048770 Nonvolatile semiconductor memory device and method of manufacturing the same Apr. 11, 2000
6040216 Method (and device) for producing tunnel silicon oxynitride layer Mar. 21, 2000
6040605 Semiconductor memory device Mar. 21, 2000
6033954 Method of fabricating flash memory cell Mar. 7, 2000
6034896 Method of fabricating a fast programmable flash E.sup.2 PROM cell Mar. 7, 2000
6030869 Method for fabricating nonvolatile semiconductor memory device Feb. 29, 2000
6031264 Nitride spacer technology for flash EPROM Feb. 29, 2000
6027947 Partially or completely encapsulated top electrode of a ferroelectric capacitor Feb. 22, 2000
6028346 Isolated trench semiconductor device Feb. 22, 2000
6025229 Method of fabricating split-gate source side injection flash memory array Feb. 15, 2000

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