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Class Information
Number: 257/E21.422
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Processes or apparatus adapted for manufacture or treatment of semiconductor or solid-state devices or of parts thereof (epo) > Manufacture or treatment of semiconductor device (epo) > Device having at least one potential-jump barrier or surface barrier, e.g., pn junction, depletion layer, carrier concentration layer (epo) > Device having semiconductor body comprising group iv elements or group iii-v compounds with or without impurities, e.g., doping materials (epo) > Multi-step process for the manufacture of unipolar device (epo) > Field-effect transistor (epo) > With an insulated gate (epo) > With floating gate (epo)
Description: This subclass is indented under subclass E21.409. This subclass is substantially the same in scope as ECLA classification H01L21/336F.










Patents under this class:
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Patent Number Title Of Patent Date Issued
6653183 Single-poly EPROM and method for forming the same Nov. 25, 2003
6653189 Source side boron implant and drain side MDD implant for deep sub 0.18 micron flash memory Nov. 25, 2003
6653674 Vertical source/drain contact semiconductor Nov. 25, 2003
6653682 Non-volatile electrically alterable semiconductor memory device Nov. 25, 2003
6654284 Channel write/erase flash memory cell and its manufacturing method Nov. 25, 2003
6649470 Dual floating gate programmable read only memory cell structure and method for its fabrication and operation Nov. 18, 2003
6649474 Method for fabricating a source line of a flash memory cell Nov. 18, 2003
6649475 Method of forming twin-spacer gate flash device and the structure of the same Nov. 18, 2003
6649966 Quantum dot of single electron memory device and method for fabricating thereof Nov. 18, 2003
6649967 Non-volatile memory device with a floating gate having a tapered protrusion Nov. 18, 2003
6646326 Method and system for providing source/drain-gate spatial overlap engineering for low-power devices Nov. 11, 2003
6645812 Method for fabricating a non-volatile semiconductor memory cell with a separate tunnel window Nov. 11, 2003
6645869 Etching back process to improve topographic planarization of a polysilicon layer Nov. 11, 2003
6642103 Semiconductor device and method of manufacturing the same Nov. 4, 2003
6642106 Method for increasing core gain in flash memory device using strained silicon Nov. 4, 2003
6642108 Fabrication processes for semiconductor non-volatile memory device Nov. 4, 2003
6642571 Nonvolatile semiconductor memory Nov. 4, 2003
6642572 Nonvolatile semiconductor memory device and method for fabricating the same Nov. 4, 2003
6642586 Semiconductor memory capable of being driven at low voltage and its manufacture method Nov. 4, 2003
6639268 Flash memory with ultra thin vertical body transistors Oct. 28, 2003
6639269 Electrically programmable memory cell configuration and method for fabricating it Oct. 28, 2003
6635531 Method of manufacturing non-volatile semiconductor memory device Oct. 21, 2003
6635920 Non-volatile semiconductor memory device and manufacturing method thereof Oct. 21, 2003
6635922 Method to fabricate poly tip in split gate flash Oct. 21, 2003
6627943 Flash memory device and method for fabricating the same Sep. 30, 2003
6624028 Method of fabricating poly spacer gate structure Sep. 23, 2003
6624029 Method of fabricating a self-aligned non-volatile memory cell Sep. 23, 2003
6624465 Multi-layer spacer technology for flash EEPROM Sep. 23, 2003
6620684 Method of manufacturing nonvolatile memory cell Sep. 16, 2003
6620698 Method of manufacturing a flash memory Sep. 16, 2003
6621115 Scalable flash EEPROM memory cell with floating gate spacer wrapped by control gate Sep. 16, 2003
6621116 Enhanced EPROM structures with accentuated hot electron generation regions Sep. 16, 2003
6617639 Use of high-K dielectric material for ONO and tunnel oxide to improve floating gate flash memory coupling Sep. 9, 2003
6613630 Nonvolatile memory device and fabricating method thereof Sep. 2, 2003
6608347 Semiconductor device and method of manufacturing the same Aug. 19, 2003
6605484 Process for optically erasing charge buildup during fabrication of an integrated circuit Aug. 12, 2003
6600188 EEPROM with a neutralized doping at tunnel window edge Jul. 29, 2003
6596585 Method of manufacturing semiconductor device Jul. 22, 2003
6596587 Shallow junction EEPROM device and process for fabricating the device Jul. 22, 2003
6596588 Method of fabricating a flash memory cell Jul. 22, 2003
6597036 Multi-value single electron memory using double-quantum dot and driving method thereof Jul. 22, 2003
6593186 Method for manufacturing non-volatile semiconductor memory device Jul. 15, 2003
6593187 Method to fabricate a square poly spacer in flash Jul. 15, 2003
6586302 Method of using trenching techniques to make a transistor with a floating gate Jul. 1, 2003
6587396 Structure of horizontal surrounding gate flash memory cell Jul. 1, 2003
6582998 Method for fabricating nonvolatile semiconductor memory device Jun. 24, 2003
6583479 Sidewall NROM and method of manufacture thereof for non-volatile memory cells Jun. 24, 2003
6579761 Method to improve the coupling ratio of top gate to floating gate in flash Jun. 17, 2003
6580124 Multigate semiconductor device with vertical channel current and method of fabrication Jun. 17, 2003
6580639 Method of reducing program disturbs in NAND type flash memory devices Jun. 17, 2003

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