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Class Information
Number: 257/E21.385
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Processes or apparatus adapted for manufacture or treatment of semiconductor or solid-state devices or of parts thereof (epo) > Manufacture or treatment of semiconductor device (epo) > Device having at least one potential-jump barrier or surface barrier, e.g., pn junction, depletion layer, carrier concentration layer (epo) > Device having semiconductor body comprising group iv elements or group iii-v compounds with or without impurities, e.g., doping materials (epo) > Multi-step process for manufacture of device of bipolar type, e.g., diodes, transistors, thyristors, resistors, capacitors) (epo) > Device comprising three or more electrodes (epo) > Transistor (epo) > Field-effect controlled bipolar-type transi stor, e.g., insulated gate bipolar transistor (igbt) (epo) > Vertical insulated gate bipolar transistor (epo) > With recess formed by etching in source/emitter contact region (epo)
Description: This subclass is indented under subclass E21.383. This subclass is substantially the same in scope as ECLA classification H01L21/331G2B.
Patents under this class:
Patent Number |
Title Of Patent |
Date Issued |
8609492 |
Vertical memory cell |
Dec. 17, 2013 |
8586435 |
Fabrication of MOSFET device with reduced breakdown voltage |
Nov. 19, 2013 |
8377785 |
Planar field effect transistor structure having an angled crystallographic etch-defined source/drain recess and a method of forming the transistor structure |
Feb. 19, 2013 |
8299455 |
Semiconductor structures having improved contact resistance |
Oct. 30, 2012 |
8198157 |
Methods of forming non-volatile memory devices including dummy word lines |
Jun. 12, 2012 |
8154050 |
Semiconductor device with semiconductor epitaxial layers buried in source/drain regions, and fabrication method of the same |
Apr. 10, 2012 |
8071442 |
Transistor with embedded Si/Ge material having reduced offset to the channel region |
Dec. 6, 2011 |
7986003 |
Semiconductor device and manufacturing method thereof |
Jul. 26, 2011 |
7964897 |
Direct contact to area efficient body tie process flow |
Jun. 21, 2011 |
7800183 |
Semiconductor device |
Sep. 21, 2010 |
7696019 |
Semiconductor devices and methods of manufacturing thereof |
Apr. 13, 2010 |
7456466 |
NAND flash memory device and method of manufacturing the same |
Nov. 25, 2008 |
6646304 |
Universal semiconductor wafer for high-voltage semiconductor components |
Nov. 11, 2003 |
6630711 |
Semiconductor structures with trench contacts |
Oct. 7, 2003 |
6509607 |
Semiconductor device with reduced source diffusion distance and method of making same |
Jan. 21, 2003 |
6501128 |
Insulated gate transistor and the method of manufacturing the same |
Dec. 31, 2002 |
6437399 |
Semiconductor structures with trench contacts |
Aug. 20, 2002 |
6225643 |
SOI cell and method for producing it |
May. 1, 2001 |
6214673 |
Process for forming vertical semiconductor device having increased source contact area |
Apr. 10, 2001 |
6165848 |
Method for the production of a MOS-controlled power semiconductor component |
Dec. 26, 2000 |
6037628 |
Semiconductor structures with trench contacts |
Mar. 14, 2000 |
5910668 |
Method of making a insulated gate bipolar transistor with high-energy P+ implant and silicon-etch contact |
Jun. 8, 1999 |
5891776 |
Methods of forming insulated-gate semiconductor devices using self-aligned trench sidewall diffusion techniques |
Apr. 6, 1999 |
5879968 |
Process for manufacture of a P-channel MOS gated device with base implant through the contact window |
Mar. 9, 1999 |
5869864 |
Field effect controlled semiconductor component |
Feb. 9, 1999 |
5843796 |
Method of making an insulated gate bipolar transistor with high-energy P+ i m |
Dec. 1, 1998 |
5801417 |
Self-aligned power MOSFET device with recessed gate and source |
Sep. 1, 1998 |
5763902 |
Insulated gate bipolar transistor having a trench and a method for production thereof |
Jun. 9, 1998 |
5583060 |
Method for manufacturing field effect controlled semiconductor components |
Dec. 10, 1996 |
5528058 |
IGBT device with platinum lifetime control and reduced gaw |
Jun. 18, 1996 |
5408117 |
Semiconductor device and method of fabricating the same |
Apr. 18, 1995 |
5283202 |
IGBT device with platinum lifetime control having gradient or profile tailored platinum diffusion regions |
Feb. 1, 1994 |
5283201 |
High density power device fabrication process |
Feb. 1, 1994 |
5262336 |
IGBT process to produce platinum lifetime control |
Nov. 16, 1993 |
5178370 |
Conductivity modulated insulated gate semiconductor device |
Jan. 12, 1993 |
5008720 |
Semiconductor device with stepped well |
Apr. 16, 1991 |
4809047 |
Insulated-gate semiconductor device with improved base-to-source electrode short and method of fabricating said short |
Feb. 28, 1989 |
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