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Class Information
Number: 257/E21.38
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Processes or apparatus adapted for manufacture or treatment of semiconductor or solid-state devices or of parts thereof (epo) > Manufacture or treatment of semiconductor device (epo) > Device having at least one potential-jump barrier or surface barrier, e.g., pn junction, depletion layer, carrier concentration layer (epo) > Device having semiconductor body comprising group iv elements or group iii-v compounds with or without impurities, e.g., doping materials (epo) > Multi-step process for manufacture of device of bipolar type, e.g., diodes, transistors, thyristors, resistors, capacitors) (epo) > Device comprising three or more electrodes (epo) > Transistor (epo) > Silicon vertical transistor (epo) > Where main current goes through whole of silicon substrate, e.g., power bipolar transistor (epo)
Description: This subclass is indented under subclass E21.375. This subclass is substantially the same in scope as ECLA classification H01L21/331F10.
Sub-classes under this class:
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7385273 |
Power semiconductor device |
Jun. 10, 2008 |
| 7320946 |
Method for generating dynamic mask pattern |
Jan. 22, 2008 |
| 7276405 |
Power semiconductor device having high breakdown voltage, low on-resistance and small switching loss and method of forming the same |
Oct. 2, 2007 |
| 7276423 |
III-nitride device and method with variable epitaxial growth direction |
Oct. 2, 2007 |
| 6784465 |
Vertical power component manufacturing method |
Aug. 31, 2004 |
| 6579782 |
Vertical power component manufacturing method |
Jun. 17, 2003 |
| 6355971 |
Semiconductor switch devices having a region with three distinct zones and their manufacture |
Mar. 12, 2002 |
| 6346444 |
Power semiconductor device using semi-insulating polycrystalline silicon and fabrication method thereof |
Feb. 12, 2002 |
| 6281548 |
Power semiconductor device using semi-insulating polycrystalline silicon |
Aug. 28, 2001 |
| 6198156 |
Bipolar power transistors and manufacturing method |
Mar. 6, 2001 |
| 6114212 |
Methods of fabricating bipolar junction transistors having an increased safe operating area |
Sep. 5, 2000 |
| 6093955 |
Power semiconductor device |
Jul. 25, 2000 |
| 6040219 |
Method of fabricating power semiconductor device using semi-insulating polycrystalline silicon (SIPOS) film |
Mar. 21, 2000 |
| 6028329 |
Bipolar junction transistor device and a method of fabricating the same |
Feb. 22, 2000 |
| 5939769 |
Bipolar power transistor with high collector breakdown voltage and related manufacturing process |
Aug. 17, 1999 |
| 5895249 |
Integrated edge structure for high voltage semiconductor devices and related manufacturing process |
Apr. 20, 1999 |
| 5872391 |
Bipolar junction transistors having an increased safe operating area |
Feb. 16, 1999 |
| 5750443 |
Method of manufacturing semiconductor device |
May. 12, 1998 |
| 5688714 |
Method of fabricating a semiconductor device having a top layer and base layer joined by wafer bonding |
Nov. 18, 1997 |
| 5629555 |
Integrated structure bipolar transistors with controlled storage time |
May. 13, 1997 |
| 5624852 |
Manufacturing process for obtaining integrated structure bipolar transistors with controlled storage time |
Apr. 29, 1997 |
| 5569612 |
Process for manufacturing a bipolar power transistor having a high breakdown voltage |
Oct. 29, 1996 |
| 5489799 |
Integrated edge structure for high voltage semiconductor devices and related manufacturing processs |
Feb. 6, 1996 |
| 5482873 |
Method for fabricating a bipolar power transistor |
Jan. 9, 1996 |
| 5416354 |
Inverted epitaxial process semiconductor devices |
May. 16, 1995 |
| 5397913 |
Biopolar/Darlington transistor having enhanced comprehensive electricity characteristics |
Mar. 14, 1995 |
| 5313092 |
Semiconductor power device having walls of an inverted mesa shape to improve power handling capability |
May. 17, 1994 |
| 5164218 |
Semiconductor device and a method for producing the same |
Nov. 17, 1992 |
| 4971929 |
Method of making RF transistor employing dual metallization with self-aligned first metal |
Nov. 20, 1990 |
| 4663820 |
Metallizing process for semiconductor devices |
May. 12, 1987 |
| 4662062 |
Method for making bipolar transistor having a graft-base configuration |
May. 5, 1987 |
| 4610730 |
Fabrication process for bipolar devices |
Sep. 9, 1986 |
| 4581319 |
Method for the manufacture of bipolar transistor structures with self-adjusting emitter and base regions for extreme high frequency circuits |
Apr. 8, 1986 |
| 4483738 |
Method for manufacturing bipolar planar transistors |
Nov. 20, 1984 |
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