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Class Information
Number: 257/E21.376
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Processes or apparatus adapted for manufacture or treatment of semiconductor or solid-state devices or of parts thereof (epo) > Manufacture or treatment of semiconductor device (epo) > Device having at least one potential-jump barrier or surface barrier, e.g., pn junction, depletion layer, carrier concentration layer (epo) > Device having semiconductor body comprising group iv elements or group iii-v compounds with or without impurities, e.g., doping materials (epo) > Multi-step process for manufacture of device of bipolar type, e.g., diodes, transistors, thyristors, resistors, capacitors) (epo) > Device comprising three or more electrodes (epo) > Transistor (epo) > Silicon vertical transistor (epo) > Planar transistor (epo)
Description: This subclass is indented under subclass E21.375. This subclass is substantially the same in scope as ECLA classification H01L21/331F2.










Patents under this class:

Patent Number Title Of Patent Date Issued
8258626 Copper interconnection, method for forming copper interconnection structure, and semiconductor device Sep. 4, 2012
7553757 Semiconductor device and method of manufacturing the same Jun. 30, 2009
T104102 Polysilicon-base self-aligned bipolar transistor process and structure Apr. 3, 1984
4381953 Polysilicon-base self-aligned bipolar transistor process May. 3, 1983











 
 
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