| |
 |
|
Class Information
Number: 257/E21.375
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Processes or apparatus adapted for manufacture or treatment of semiconductor or solid-state devices or of parts thereof (epo) > Manufacture or treatment of semiconductor device (epo) > Device having at least one potential-jump barrier or surface barrier, e.g., pn junction, depletion layer, carrier concentration layer (epo) > Device having semiconductor body comprising group iv elements or group iii-v compounds with or without impurities, e.g., doping materials (epo) > Multi-step process for manufacture of device of bipolar type, e.g., diodes, transistors, thyristors, resistors, capacitors) (epo) > Device comprising three or more electrodes (epo) > Transistor (epo) > Silicon vertical transistor (epo)
Description: This subclass is indented under subclass E21.037. This subclass is substantially the same in scope as ECLA classification H01L21/331F.
Sub-classes under this class:
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7414298 |
Super self-aligned collector device for mono-and hetero bipolar junction transistors, and method of making same |
Aug. 19, 2008 |
| 7410856 |
Methods of forming vertical transistors |
Aug. 12, 2008 |
| 7364997 |
Methods of forming integrated circuitry and methods of forming local interconnects |
Apr. 29, 2008 |
| 7347228 |
Method of making semiconductor devices |
Mar. 25, 2008 |
| 7288815 |
Semiconductor device and manufacturing method thereof |
Oct. 30, 2007 |
| 7276754 |
Annular gate and technique for fabricating an annular gate |
Oct. 2, 2007 |
| 7271048 |
Method for manufacturing trench MOSFET |
Sep. 18, 2007 |
| 7271067 |
Voltage sustaining layer with opposite-doped islands for semiconductor power devices |
Sep. 18, 2007 |
| 7259048 |
Vertical replacement-gate silicon-on-insulator transistor |
Aug. 21, 2007 |
| 7253070 |
Transistor structure with minimized parasitics and method of fabricating the same |
Aug. 7, 2007 |
| 7208370 |
Method for fabricating a vertical transistor in a trench, and vertical transistor |
Apr. 24, 2007 |
| 7064361 |
NPN transistor having reduced extrinsic base resistance and improved manufacturability |
Jun. 20, 2006 |
| 7060583 |
Method for manufacturing a bipolar transistor having a polysilicon emitter |
Jun. 13, 2006 |
| 7045876 |
Amorphizing ion implant method for forming polysilicon emitter bipolar transistor |
May. 16, 2006 |
| 7045845 |
Self-aligned vertical gate semiconductor device |
May. 16, 2006 |
| 7037799 |
Breakdown voltage adjustment for bipolar transistors |
May. 2, 2006 |
| 7034379 |
Carbide emitter mask etch stop |
Apr. 25, 2006 |
| 7029981 |
Radiation hardened bipolar junction transistor |
Apr. 18, 2006 |
| 7015085 |
Super self-aligned collector device for mono-and hetero bipolar junction transistors and method of making same |
Mar. 21, 2006 |
| 7008852 |
Discontinuous dielectric interface for bipolar transistors |
Mar. 7, 2006 |
| 6984872 |
Method for fabricating an NPN transistor in a BICMOS technology |
Jan. 10, 2006 |
| 6979624 |
Reduced mask count buried layer process |
Dec. 27, 2005 |
| 6972472 |
Quasi self-aligned single polysilicon bipolar active device with intentional emitter window undercut |
Dec. 6, 2005 |
| 6964907 |
Method of etching a lateral trench under an extrinsic base and improved bipolar transistor |
Nov. 15, 2005 |
| 6943426 |
Complementary analog bipolar transistors with trench-constrained isolation diffusion |
Sep. 13, 2005 |
| 6939771 |
Discontinuous dielectric interface for bipolar transistors |
Sep. 6, 2005 |
| 6914308 |
Vertical PNP bipolar transistor |
Jul. 5, 2005 |
| 6905935 |
Method for fabricating a vertical bipolar junction transistor |
Jun. 14, 2005 |
| 6891249 |
Method and system for high density integrated bipolar power transistor using buried power buss |
May. 10, 2005 |
| 6890826 |
Method of making bipolar transistor with integrated base contact and field plate |
May. 10, 2005 |
| 6887765 |
Method for manufacturing a bipolar junction transistor |
May. 3, 2005 |
| 6869851 |
Transistors formed with grid or island implantation masks to form reduced diffusion-depth regions without additional masks and process steps |
Mar. 22, 2005 |
| 6853017 |
Bipolar transistor structure with ultra small polysilicon emitter |
Feb. 8, 2005 |
| 6838350 |
Triply implanted complementary bipolar transistors |
Jan. 4, 2005 |
| 6830982 |
Method for reducing extrinsic base resistance and improving manufacturability in an NPN transistor |
Dec. 14, 2004 |
| 6828635 |
Method for making high-gain vertical bipolar junction transistor structures compatible with CMOS process |
Dec. 7, 2004 |
| 6822314 |
Base for a NPN bipolar transistor |
Nov. 23, 2004 |
| 6815301 |
Method for fabricating bipolar transistor |
Nov. 9, 2004 |
| 6815302 |
Method of making a bipolar transistor with an oxygen implanted emitter window |
Nov. 9, 2004 |
| 6808999 |
Method of making a bipolar transistor having a reduced base transit time |
Oct. 26, 2004 |
| 6806152 |
Retrograde doped buried layer transistor and method for producing the same |
Oct. 19, 2004 |
| 6806159 |
Method for manufacturing a semiconductor device with sinker contact region |
Oct. 19, 2004 |
| 6803317 |
Method of making a vertical gate semiconductor device |
Oct. 12, 2004 |
| 6797577 |
One mask PNP (or NPN) transistor allowing high performance |
Sep. 28, 2004 |
| 6794730 |
High performance PNP bipolar device fully compatible with CMOS process |
Sep. 21, 2004 |
| 6784065 |
Bipolar transistor with ultra small self-aligned polysilicon emitter and method of forming the transistor |
Aug. 31, 2004 |
| 6780725 |
METHOD FOR FORMING A SEMICONDUCTOR DEVICE INCLUDING FORMING VERTICAL NPN AND PNP TRANSISTORS BY EXPOSING THE EPITAXIAL LAYER, FORMING A MONOCRYSTAL LAYER AND ADJUSTING THE IMPURITY CONCENTRATI |
Aug. 24, 2004 |
| 6773973 |
Semiconductor transistor having a polysilicon emitter and methods of making the same |
Aug. 10, 2004 |
| 6774455 |
Semiconductor device with a collector contact in a depressed well-region |
Aug. 10, 2004 |
| 6767797 |
Method of fabricating complementary self-aligned bipolar transistors |
Jul. 27, 2004 |
|
|
|
