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Class Information
Number: 257/E21.325
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Processes or apparatus adapted for manufacture or treatment of semiconductor or solid-state devices or of parts thereof (epo) > Manufacture or treatment of semiconductor device (epo) > Device having at least one potential-jump barrier or surface barrier, e.g., pn junction, depletion layer, carrier concentration layer (epo) > Device having semiconductor body comprising group iv elements or group iii-v compounds with or without impurities, e.g., doping materials (epo) > Treatment of semiconductor body using process other than deposition of semiconductor material on a substrate, diffusion or alloying of impurity material, or radiation treatment (epo) > Of diamond body (epo) > For the formation of pn junction without ad dition of impurities (epo)
Description: This subclass is indented under subclass E21.324. This subclass is substantially the same in scope as ECLA classification H01L21/324B.

Patents under this class:

Patent Number Title Of Patent Date Issued
RE44473 Method for fabricating semiconductor device with vertical channel transistor Sep. 3, 2013
8513719 Integrated transistor and anti-fuse programming element for a high-voltage integrated circuit Aug. 20, 2013
8426287 Method of manufacturing semiconductor device, solid-state imaging device, and solid-state imaging apparatus Apr. 23, 2013
8258559 Image sensor photodiode arrangement Sep. 4, 2012
8164125 Integrated transistor and anti-fuse as programming element for a high-voltage integrated circuit Apr. 24, 2012
7897471 Method and apparatus to improve the reliability of the breakdown voltage in high voltage devices Mar. 1, 2011
7750366 Solid-state imaging element and method for manufacturing the same Jul. 6, 2010
7718515 Method for fabricating semiconductor device May. 18, 2010
7670909 Method for fabricating semiconductor device with vertical channel transistor Mar. 2, 2010
7541291 Reduction of feature critical dimensions Jun. 2, 2009
6376321 Method of making a pn-junction in a semiconductor element Apr. 23, 2002
4505759 Method for making a conductive silicon substrate by heat treatment of oxygenated and lightly doped silicon single crystals Mar. 19, 1985

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