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Class Information
Number: 257/E21.316
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Processes or apparatus adapted for manufacture or treatment of semiconductor or solid-state devices or of parts thereof (epo) > Manufacture or treatment of semiconductor device (epo) > Device having at least one potential-jump barrier or surface barrier, e.g., pn junction, depletion layer, carrier concentration layer (epo) > Device having semiconductor body comprising group iv elements or group iii-v compounds with or without impurities, e.g., doping materials (epo) > Treatment of semiconductor body using process other than deposition of semiconductor material on a substrate, diffusion or alloying of impurity material, or radiation treatment (epo) > To change their surface-physical characteristics or shape, e.g., etching, polishing, cutting (epo) > Deposition/post-treatment of noninsulating, e.g., conductive - or resistive - layers on insulating layers (epo) > Post treatment (epo) > Doping layer (epo) > Doping polycrystalline or amorphous silicon layer (epo)
Description: This subclass is indented under subclass E21.315. This subclass is substantially the same in scope as ECLA classification H01L21/3215B.

Patents under this class:
1 2 3 4 5

Patent Number Title Of Patent Date Issued
8367486 Transistor and method for manufacturing the transistor Feb. 5, 2013
8314428 Thin film transistor with LDD/offset structure Nov. 20, 2012
8252668 Photoelectric conversion device fabrication method Aug. 28, 2012
8088676 Metal-induced crystallization of amorphous silicon, polycrystalline silicon thin films produced thereby and thin film transistors produced therefrom Jan. 3, 2012
8062921 Phase change memories with improved programming characteristics Nov. 22, 2011
8030146 Organic light emitting diode (OLED) display panel and method of forming polysilicon channel layer thereof Oct. 4, 2011
7985678 Method of manufacturing a semiconductor integrated circuit device Jul. 26, 2011
7964479 Low-temperature formation of layers of polycrystalline semiconductor material Jun. 21, 2011
7935591 Method for fabricating PMOS transistor and method for forming dual gate using the same May. 3, 2011
7927986 Ion implantation with heavy halogenide compounds Apr. 19, 2011
7927957 Method for producing bonded silicon wafer Apr. 19, 2011
7923357 Method for forming poly-silicon film Apr. 12, 2011
7897471 Method and apparatus to improve the reliability of the breakdown voltage in high voltage devices Mar. 1, 2011
7833905 Method of manufacturing a semiconductor integrated circuit device Nov. 16, 2010
7776669 Thin film transistor and method of fabricating the same Aug. 17, 2010
7723219 Plasma immersion ion implantation process with reduced polysilicon gate loss and reduced particle deposition May. 25, 2010
7682974 Method for manufacturing semiconductor device Mar. 23, 2010
7659213 Transistor having an embedded tensile strain layer with reduced offset to the gate electrode and a method for forming the same Feb. 9, 2010
7601571 Methods of manufacturing interferometric modulators with thin film transistors Oct. 13, 2009
7595266 Method of manufacturing a semiconductor integrated circuit device Sep. 29, 2009
7528026 Method for reducing silicide defects by removing contaminants prior to drain/source activation May. 5, 2009
7501673 Semiconductor device multilayer structure, fabrication method for the same, semiconductor device having the same, and semiconductor device fabrication method Mar. 10, 2009
7439088 Liquid crystal display device and fabricating method thereof Oct. 21, 2008
7439116 Apparatus and method for forming polycrystalline silicon thin film Oct. 21, 2008
7393765 Low temperature CVD process with selected stress of the CVD layer on CMOS devices Jul. 1, 2008
7361577 Method of manufacturing semiconductor device Apr. 22, 2008
7312137 Transistor with shallow germanium implantation region in channel Dec. 25, 2007
7303995 Method for reducing dimensions between patterns on a photoresist Dec. 4, 2007
7268065 Methods of manufacturing metal-silicide features Sep. 11, 2007
7223676 Very low temperature CVD process with independently variable conformality, stress and composition of the CVD layer May. 29, 2007
7220647 Method of cleaning wafer and method of manufacturing gate structure May. 22, 2007
7192854 Method of plasma doping Mar. 20, 2007
7094670 Plasma immersion ion implantation process Aug. 22, 2006
7084000 Solid-state imaging device and method for manufacturing the same Aug. 1, 2006
7060578 Semiconductor device and method of fabricating the same Jun. 13, 2006
7046760 Method of measuring and controlling concentration of dopants of a thin film May. 16, 2006
6887748 Mixed-mode process May. 3, 2005
6875676 Methods for producing a highly doped electrode for a field effect transistor Apr. 5, 2005
6855605 Semiconductor device with selectable gate thickness and method of manufacturing such devices Feb. 15, 2005
6835610 Method of manufacturing semiconductor device having gate electrode with expanded upper portion Dec. 28, 2004
6693022 CVD method of producing in situ-doped polysilicon layers and polysilicon layered structures Feb. 17, 2004
6677211 Method for eliminating polysilicon residue Jan. 13, 2004
6660586 Semiconductor device and process for manufacturing same Dec. 9, 2003
6635310 Method of heat treatment Oct. 21, 2003
6596605 Method of forming germanium doped polycrystalline silicon gate of MOS transistor and method of forming CMOS transistor device using the same Jul. 22, 2003
6545328 Semiconductor device Apr. 8, 2003
6479373 Method of structuring layers with a polysilicon layer and an overlying metal or metal silicide layer using a three step etching process with fluorine, chlorine, bromine containing gases Nov. 12, 2002
6468888 Method for forming polysilicon-germanium gate in CMOS transistor and device made thereby Oct. 22, 2002
6383901 Method for forming the ultra-shallow junction by using the arsenic plasma May. 7, 2002
6380055 Dopant diffusion-retarding barrier region formed within polysilicon gate layer Apr. 30, 2002

1 2 3 4 5

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