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Class Information
Number: 257/E21.315
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Processes or apparatus adapted for manufacture or treatment of semiconductor or solid-state devices or of parts thereof (epo) > Manufacture or treatment of semiconductor device (epo) > Device having at least one potential-jump barrier or surface barrier, e.g., pn junction, depletion layer, carrier concentration layer (epo) > Device having semiconductor body comprising group iv elements or group iii-v compounds with or without impurities, e.g., doping materials (epo) > Treatment of semiconductor body using process other than deposition of semiconductor material on a substrate, diffusion or alloying of impurity material, or radiation treatment (epo) > To change their surface-physical characteristics or shape, e.g., etching, polishing, cutting (epo) > Deposition/post-treatment of noninsulating, e.g., conductive - or resistive - layers on insulating layers (epo) > Post treatment (epo) > Doping layer (epo)
Description: This subclass is indented under subclass E21.3. This subclass is substantially the same in scope as ECLA classification H01L21/3215.










Sub-classes under this class:

Class Number Class Name Patents
257/E21.316 Doping polycrystalline or amorphous silicon layer (epo) 226


Patents under this class:

Patent Number Title Of Patent Date Issued
8633105 Method of fabricating a self-aligning damascene memory structure Jan. 21, 2014
8513719 Integrated transistor and anti-fuse programming element for a high-voltage integrated circuit Aug. 20, 2013
8481378 Effecting selectivity of silicon or silicon-germanium deposition on a silicon or silicon-germanium substrate by doping Jul. 9, 2013
8389399 Method of fabricating a self-aligning damascene memory structure Mar. 5, 2013
8329532 Process for the simultaneous deposition of crystalline and amorphous layers with doping Dec. 11, 2012
8164125 Integrated transistor and anti-fuse as programming element for a high-voltage integrated circuit Apr. 24, 2012
8102052 Process for the simultaneous deposition of crystalline and amorphous layers with doping Jan. 24, 2012
8080452 Effecting selectivity of silicon or silicon-germanium deposition on a silicon or silicon-germanium substrate by doping Dec. 20, 2011
7947552 Process for the simultaneous deposition of crystalline and amorphous layers with doping May. 24, 2011
7939437 Metallization method for solar cells May. 10, 2011
7807577 Fabrication of integrated circuits with isolation trenches Oct. 5, 2010
7727867 Method for manufacturing SIMOX wafer Jun. 1, 2010
7629247 Method of fabricating a self-aligning damascene memory structure Dec. 8, 2009
7569449 Processes providing high and low threshold p-type and n-type transistors Aug. 4, 2009
7553763 Salicide process utilizing a cluster ion implantation process Jun. 30, 2009
7348229 Method of manufacturing a semiconductor device and semiconductor device obtained with such a method Mar. 25, 2008
7071086 Method of forming a metal gate structure with tuning of work function by silicon incorporation Jul. 4, 2006
6969648 Method for forming buried plate of trench capacitor Nov. 29, 2005
6872639 Fabrication of semiconductor devices with transition metal boride films as diffusion barriers Mar. 29, 2005
6812530 Methods for forming wordlines, transistor gates, and conductive interconnects, and wordline, transistor gate, and conductive interconnect structures Nov. 2, 2004
6797601 Methods for forming wordlines, transistor gates, and conductive interconnects Sep. 28, 2004
6613654 Fabrication of semiconductor devices with transition metal boride films as diffusion barriers Sep. 2, 2003
6614082 Fabrication of semiconductor devices with transition metal boride films as diffusion barriers Sep. 2, 2003
6399445 Fabrication technique for controlled incorporation of nitrogen in gate dielectric Jun. 4, 2002
6391754 Method of making an integrated circuit interconnect May. 21, 2002
6180469 Low resistance salicide technology with reduced silicon consumption Jan. 30, 2001
6124620 Incorporating barrier atoms into a gate dielectric using gas cluster ion beam implantation Sep. 26, 2000
6072222 Silicon implantation into selective areas of a refractory metal to reduce consumption of silicon-based junctions during salicide formation Jun. 6, 2000
5994210 Method of improving silicide sheet resistance by implanting fluorine Nov. 30, 1999
5654209 Method of making N-type semiconductor region by implantation Aug. 5, 1997
5190888 Method for producing a doped polycide layer on a semiconductor substrate Mar. 2, 1993
4890151 Thin-film and its forming method Dec. 26, 1989
4704367 Suppression of hillock growth through multiple thermal cycles by argon implantation Nov. 3, 1987
4569124 Method for forming thin conducting lines by ion implantation and preferential etching Feb. 11, 1986
4502207 Wiring material for semiconductor device and method for forming wiring pattern therewith Mar. 5, 1985
4482394 Method of making aluminum alloy film by implanting silicon ions followed by thermal diffusion Nov. 13, 1984
4450041 Chemical etching of transformed structures May. 22, 1984
4377734 Method for forming patterns by plasma etching Mar. 22, 1983
4314874 Method for forming a fine pattern of an aluminum film Feb. 9, 1982
4146902 Irreversible semiconductor switching element and semiconductor memory device utilizing the same Mar. 27, 1979











 
 
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