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Class Information
Number: 257/E21.304
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Processes or apparatus adapted for manufacture or treatment of semiconductor or solid-state devices or of parts thereof (epo) > Manufacture or treatment of semiconductor device (epo) > Device having at least one potential-jump barrier or surface barrier, e.g., pn junction, depletion layer, carrier concentration layer (epo) > Device having semiconductor body comprising group iv elements or group iii-v compounds with or without impurities, e.g., doping materials (epo) > Treatment of semiconductor body using process other than deposition of semiconductor material on a substrate, diffusion or alloying of impurity material, or radiation treatment (epo) > To change their surface-physical characteristics or shape, e.g., etching, polishing, cutting (epo) > Deposition/post-treatment of noninsulating, e.g., conductive - or resistive - layers on insulating layers (epo) > Post treatment (epo) > Planarization (epo) > By chemical mechanical polishing (cmp) (epo)
Description: This subclass is indented under subclass E21.303. This subclass is substantially the same in scope as ECLA classification H01L21/321P2.
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7432200 |
Filling narrow and high aspect ratio openings using electroless deposition |
Oct. 7, 2008 |
| 7427561 |
Method for manufacturing semiconductor device |
Sep. 23, 2008 |
| 7422982 |
Method and apparatus for electroprocessing a substrate with edge profile control |
Sep. 9, 2008 |
| 7419906 |
Method for manufacturing a through conductor |
Sep. 2, 2008 |
| 7416987 |
Semiconductor device and method of fabricating the same |
Aug. 26, 2008 |
| 7416942 |
Method for manufacturing semiconductor device |
Aug. 26, 2008 |
| 7413989 |
Method of manufacturing semiconductor device |
Aug. 19, 2008 |
| 7410854 |
Method of making FUSI gate and resulting structure |
Aug. 12, 2008 |
| 7408215 |
Dynamic random access memory |
Aug. 5, 2008 |
| 7397075 |
Method and apparatus providing CMOS imager device pixel with transistor having lower threshold voltage than other imager device transistors |
Jul. 8, 2008 |
| 7397074 |
RF field heated diodes for providing thermally assisted switching to magnetic memory elements |
Jul. 8, 2008 |
| 7390744 |
Method and composition for polishing a substrate |
Jun. 24, 2008 |
| 7384841 |
DRAM device and method of manufacturing the same |
Jun. 10, 2008 |
| 7384834 |
Semiconductor device and a method of manufacturing the same |
Jun. 10, 2008 |
| 7384833 |
Stress liner for integrated circuits |
Jun. 10, 2008 |
| 7368383 |
Hillock reduction in copper films |
May. 6, 2008 |
| 7365009 |
Structure of metal interconnect and fabrication method thereof |
Apr. 29, 2008 |
| 7361603 |
Passivative chemical mechanical polishing composition for copper film planarization |
Apr. 22, 2008 |
| 7361539 |
Dual stress liner |
Apr. 22, 2008 |
| 7348231 |
Methods of fabricating semiconductor devices having insulating layers with differing compressive stresses |
Mar. 25, 2008 |
| 7344987 |
Method for CMP with variable down-force adjustment |
Mar. 18, 2008 |
| 7344954 |
Method of manufacturing a capacitor deep trench and of etching a deep trench opening |
Mar. 18, 2008 |
| 7341948 |
Method of making a semiconductor structure with a plating enhancement layer |
Mar. 11, 2008 |
| 7341908 |
Semiconductor device and method of manufacturing the same |
Mar. 11, 2008 |
| 7339226 |
Dual-level stacked flash memory cell with a MOSFET storage transistor |
Mar. 4, 2008 |
| 7338905 |
Semiconductor device manufacture method |
Mar. 4, 2008 |
| 7338882 |
Method of fabricating nano SOI wafer and nano SOI wafer fabricated by the same |
Mar. 4, 2008 |
| 7332425 |
Simultaneous deposition and etch process for barrier layer formation in microelectronic device interconnects |
Feb. 19, 2008 |
| 7329606 |
Semiconductor device having nanowire contact structures and method for its fabrication |
Feb. 12, 2008 |
| 7327009 |
Selective nitride liner formation for shallow trench isolation |
Feb. 5, 2008 |
| 7314823 |
Chemical mechanical polishing composition and process |
Jan. 1, 2008 |
| 7312151 |
System for ultraviolet atmospheric seed layer remediation |
Dec. 25, 2007 |
| 7307021 |
Method for planarizing a thin film |
Dec. 11, 2007 |
| 7306955 |
Method of performing a double-sided process |
Dec. 11, 2007 |
| 7303971 |
MSM binary switch memory device |
Dec. 4, 2007 |
| 7297558 |
Method of manufacturing semiconductor device |
Nov. 20, 2007 |
| 7288458 |
SOI active layer with different surface orientation |
Oct. 30, 2007 |
| 7285494 |
Multiple stage electroless deposition of a metal layer |
Oct. 23, 2007 |
| 7276438 |
Method of manufacturing wiring substrate |
Oct. 2, 2007 |
| 7271088 |
Slurry composition with high planarity and CMP process of dielectric film using the same |
Sep. 18, 2007 |
| 7262504 |
Multiple stage electroless deposition of a metal layer |
Aug. 28, 2007 |
| 7259076 |
High-density SOI cross-point memory fabricating method |
Aug. 21, 2007 |
| 7256107 |
Damascene process for use in fabricating semiconductor structures having micro/nano gaps |
Aug. 14, 2007 |
| 7256091 |
Method of manufacturing a semiconductor device with a self-aligned polysilicon electrode |
Aug. 14, 2007 |
| 7250365 |
Fabrication method of semiconductor integrated circuit device |
Jul. 31, 2007 |
| 7250335 |
Methods of fabricating integrated circuit devices including self-aligned contacts with increased alignment margin |
Jul. 31, 2007 |
| 7241632 |
MTJ read head with sidewall spacers |
Jul. 10, 2007 |
| 7235485 |
Method of manufacturing semiconductor device |
Jun. 26, 2007 |
| 7232760 |
Method for producing semiconductor device, polishing apparatus, and polishing method |
Jun. 19, 2007 |
| 7229927 |
Semiconductor processing silica soot abrasive slurry method for integrated circuit microelectronics |
Jun. 12, 2007 |
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