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Class Information
Number: 257/E21.293
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Processes or apparatus adapted for manufacture or treatment of semiconductor or solid-state devices or of parts thereof (epo) > Manufacture or treatment of semiconductor device (epo) > Device having at least one potential-jump barrier or surface barrier, e.g., pn junction, depletion layer, carrier concentration layer (epo) > Device having semiconductor body comprising group iv elements or group iii-v compounds with or without impurities, e.g., doping materials (epo) > Treatment of semiconductor body using process other than deposition of semiconductor material on a substrate, diffusion or alloying of impurity material, or radiation treatment (epo) > To change their surface-physical characteristics or shape, e.g., etching, polishing, cutting (epo) > To form insulating layer thereon, e.g., for masking or by using photolithographic technique (epo) > Inorganic layer (epo) > Inorganic layer composed of nitride (epo) > Of silicon nitride (epo)
Description: This subclass is indented under subclass E21.292. This subclass is substantially the same in scope as ECLA classification H01L21/318B.










Patents under this class:
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Patent Number Title Of Patent Date Issued
6576151 Etching of silicon nitride by anhydrous halogen gas Jun. 10, 2003
6573133 Method of forming spacers in CMOS devices Jun. 3, 2003
6569731 Method of forming a capacitor dielectric structure May. 27, 2003
6566183 Method of making a transistor, in particular spacers of the transistor May. 20, 2003
6566186 Capacitor with stoichiometrically adjusted dielectric and method of fabricating same May. 20, 2003
6566737 Passivation structure for an integrated circuit May. 20, 2003
6562734 Method of filling gaps on a semiconductor wafer May. 13, 2003
6559074 Method of forming a silicon nitride layer on a substrate May. 6, 2003
6559499 Process for fabricating an integrated circuit device having capacitors with a multilevel metallization May. 6, 2003
6555896 Etch stop for use in etching of silicon oxide Apr. 29, 2003
6551948 Flash memory device and a fabrication process thereof, method of forming a dielectric film Apr. 22, 2003
6551893 Atomic layer deposition of capacitor dielectric Apr. 22, 2003
6551946 TWO-STEP OXIDATION PROCESS FOR OXIDIZING A SILICON SUBSTRATE WHEREIN THE FIRST STEP IS CARRIED OUT AT A TEMPERATURE BELOW THE VISCOELASTIC TEMPERATURE OF SILICON DIOXIDE AND THE SECOND STEP IS Apr. 22, 2003
6548899 Method of processing films prior to chemical vapor deposition using electron beam processing Apr. 15, 2003
6548418 Dual layer etch stop barrier Apr. 15, 2003
6548368 Method of forming a MIS capacitor Apr. 15, 2003
6544908 Ammonia gas passivation on nitride encapsulated devices Apr. 8, 2003
6544900 In situ dielectric stacks Apr. 8, 2003
6541370 Composite microelectronic dielectric layer with inhibited crack susceptibility Apr. 1, 2003
6541373 Manufacture method for semiconductor with small variation in MOS threshold voltage Apr. 1, 2003
6538271 Semiconductor device and method of manufacturing the same Mar. 25, 2003
6534421 Method to fabricate thin insulating film Mar. 18, 2003
6534395 Method of forming graded thin films using alternating pulses of vapor phase reactants Mar. 18, 2003
6531415 Silicon nitride furnace tube low temperature cycle purge for attenuated particle formation Mar. 11, 2003
6528436 Method of forming silicon nitride layer directly on HSG polysilicon Mar. 4, 2003
6528430 Method of forming silicon containing thin films by atomic layer deposition utilizing Si2C16 and NH3 Mar. 4, 2003
6528364 Methods to form electronic devices and methods to form a material over a semiconductive substrate Mar. 4, 2003
6525366 Uniform dielectric layer and method to form same Feb. 25, 2003
6524975 Combined gate cap or digit line and spacer deposition using HDP Feb. 25, 2003
6521911 High dielectric constant metal silicates formed by controlled metal-surface reactions Feb. 18, 2003
6521300 Method of a surface treatment in improving adhesion of an organic polymeric low-k dielectric layer Feb. 18, 2003
6518642 Integrated circuit having a passive device integrally formed therein Feb. 11, 2003
6518117 Methods of forming nitrogen-containing masses, silicon nitride layers, and capacitor constructions Feb. 11, 2003
6514813 Method of fabricating a semiconductor device Feb. 4, 2003
6514882 Aggregate dielectric layer to reduce nitride consumption Feb. 4, 2003
6509386 Porous insulating compounds and method for making same Jan. 21, 2003
6506644 Method of fabricating semiconductor having a reduced leakage current flow between the accumulation electrode and the gate electrode Jan. 14, 2003
6503826 Semiconductor device and method for manufacturing the same Jan. 7, 2003
6500774 Method and apparatus for an increased throughput furnace nitride BARC process Dec. 31, 2002
6500772 Methods and materials for depositing films on semiconductor substrates Dec. 31, 2002
6498063 Even nucleation between silicon and oxide surfaces for thin silicon nitride film growth Dec. 24, 2002
6498107 Interface control for film deposition by gas-cluster ion-beam processing Dec. 24, 2002
6495477 Method for forming a nitridized interface on a semiconductor substrate Dec. 17, 2002
6495476 Method for preventing native oxide growth during nitridation Dec. 17, 2002
6492267 Low temperature nitride used as Cu barrier layer Dec. 10, 2002
6486077 Silicon nitride film, semiconductor device, and method for fabricating semiconductor device Nov. 26, 2002
6482694 Semiconductor device structure including a tantalum pentoxide layer sandwiched between silicon nitride layers Nov. 19, 2002
6475916 Method of patterning gate electrode with ultra-thin gate dielectric Nov. 5, 2002
6472335 Methods of adhesion promoter between low-K layer and underlying insulating layer Oct. 29, 2002
6472330 Method for forming an interlayer insulating film, and semiconductor device Oct. 29, 2002

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