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Class Information
Number: 257/E21.253
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Processes or apparatus adapted for manufacture or treatment of semiconductor or solid-state devices or of parts thereof (epo) > Manufacture or treatment of semiconductor device (epo) > Device having at least one potential-jump barrier or surface barrier, e.g., pn junction, depletion layer, carrier concentration layer (epo) > Device having semiconductor body comprising group iv elements or group iii-v compounds with or without impurities, e.g., doping materials (epo) > Treatment of semiconductor body using process other than deposition of semiconductor material on a substrate, diffusion or alloying of impurity material, or radiation treatment (epo) > To change their surface-physical characteristics or shape, e.g., etching, polishing, cutting (epo) > To form insulating layer thereon, e.g., for masking or by using photolithographic technique (epo) > Post-treatment (epo) > Etching insulating layer by chemical or physical means (epo) > Etching inorganic layer (epo) > By chemical means (epo) > By dry-etching (epo) > Of layers not containing si, e.g., pzt, al 2 o 3 (epo)
Description: This subclass is indented under subclass E21.252. This subclass is substantially the same in scope as ECLA classification H01L21/311B2B2.










Patents under this class:
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Patent Number Title Of Patent Date Issued
8669123 Method of and device for determining and controlling the distance between an integrated circuit and a substrate Mar. 11, 2014
8637927 Semiconductor devices and methods of forming the same Jan. 28, 2014
8551836 Semiconductor device and method of manufacturing the same Oct. 8, 2013
8536699 Semiconductor device manufacturing method and semiconductor device manufacturing apparatus Sep. 17, 2013
8426255 Chip package structure and method for manufacturing the same Apr. 23, 2013
8237264 Method of manufacturing semiconductor device and thermal annealing apparatus Aug. 7, 2012
8211804 Methods of forming a hole having a vertical profile and semiconductor devices having a vertical hole Jul. 3, 2012
8134194 Memory cells, memory cell constructions, and memory cell programming methods Mar. 13, 2012
8101513 Manufacture method for semiconductor device using damascene method Jan. 24, 2012
8071483 Semiconductor device manufacturing method and semiconductor device manufacturing apparatus Dec. 6, 2011
8062921 Phase change memories with improved programming characteristics Nov. 22, 2011
7985667 Method for patterning semiconductor device having magnetic tunneling junction structure Jul. 26, 2011
7964512 Method for etching high dielectric constant materials Jun. 21, 2011
7943530 Semiconductor nanowires having mobility-optimized orientations May. 17, 2011
7897414 Method of manufacturing semiconductor device and thermal annealing apparatus Mar. 1, 2011
7883632 Plasma processing method Feb. 8, 2011
7820553 Prevention of trench photoresist scum Oct. 26, 2010
7811919 Methods of fabricating a BEOL wiring structure containing an on-chip inductor and an on-chip capacitor Oct. 12, 2010
7704888 Methods for removing photoresist from semiconductor structures having high-k dielectric material layers Apr. 27, 2010
7682956 Three-dimensional metal microfabrication process and devices produced thereby Mar. 23, 2010
7662711 Method of forming dual damascene pattern Feb. 16, 2010
7629206 Patterning self-aligned transistors using back surface illumination Dec. 8, 2009
7585683 Methods of fabricating ferroelectric devices Sep. 8, 2009
7507677 Removable amorphous carbon CMP stop Mar. 24, 2009
7432210 Process to open carbon based hardmask Oct. 7, 2008
7422943 Semiconductor device capacitors with oxide-nitride layers and methods of fabricating such capacitors Sep. 9, 2008
7037848 Methods of etching insulative materials, of forming electrical devices, and of forming capacitors May. 2, 2006
7029925 FeRAM capacitor stack etch Apr. 18, 2006
7012027 Zirconium oxide and hafnium oxide etching using halogen containing chemicals Mar. 14, 2006
7001778 Method of making layered superlattice material with improved microstructure Feb. 21, 2006
7001781 Method for producing a ferroelectric capacitor that includes etching with hardmasks Feb. 21, 2006
7001821 Method of forming and using a hardmask for forming ferroelectric capacitors in a semiconductor device Feb. 21, 2006
6998303 Manufacture method for semiconductor device with patterned film of ZrO.sub.2 or the like Feb. 14, 2006
6995069 Dielectric capacitor manufacturing method and semiconductor storage device manufacturing method Feb. 7, 2006
6955992 One mask PT/PCMO/PT stack etching process for RRAM applications Oct. 18, 2005
6943039 Method of etching ferroelectric layers Sep. 13, 2005
6942813 Method of etching magnetic and ferroelectric materials using a pulsed bias source Sep. 13, 2005
6936539 Antireflective coating for use during the manufacture of a semiconductor device Aug. 30, 2005
6905971 Treatment of dielectric material to enhance etch rate Jun. 14, 2005
6902681 Method for plasma etching of high-K dielectric materials Jun. 7, 2005
6867053 Fabrication of a FeRAM capacitor using a noble metal hardmask Mar. 15, 2005
6855567 Etch endpoint detection Feb. 15, 2005
6818493 Selective metal oxide removal performed in a reaction chamber in the absence of RF activation Nov. 16, 2004
6806095 Method of plasma etching of high-K dielectric materials with high selectivity to underlying layers Oct. 19, 2004
6780766 Methods of forming regions of differing composition over a substrate Aug. 24, 2004
6767750 Detection of AIOx ears for process control in FeRAM processing Jul. 27, 2004
6767806 METHOD OF FORMING A PATTERNED SUBSTANTIALLY CRYSTALLINE TA2O5 COMPRISING MATERIAL, AND METHOD OF FORMING A CAPACITOR HAVING A CAPACITOR DIELECTRIC REGION COMPRISING SUBSTANTIALLY CRYSTALLINE T Jul. 27, 2004
6767824 Method of fabricating a gate structure of a field effect transistor using an alpha-carbon mask Jul. 27, 2004
6764898 Implantation into high-K dielectric material after gate etch to facilitate removal Jul. 20, 2004
6759286 Method of fabricating a gate structure of a field effect transistor using a hard mask Jul. 6, 2004

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