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Class Information
Number: 257/E21.252
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Processes or apparatus adapted for manufacture or treatment of semiconductor or solid-state devices or of parts thereof (epo) > Manufacture or treatment of semiconductor device (epo) > Device having at least one potential-jump barrier or surface barrier, e.g., pn junction, depletion layer, carrier concentration layer (epo) > Device having semiconductor body comprising group iv elements or group iii-v compounds with or without impurities, e.g., doping materials (epo) > Treatment of semiconductor body using process other than deposition of semiconductor material on a substrate, diffusion or alloying of impurity material, or radiation treatment (epo) > To change their surface-physical characteristics or shape, e.g., etching, polishing, cutting (epo) > To form insulating layer thereon, e.g., for masking or by using photolithographic technique (epo) > Post-treatment (epo) > Etching insulating layer by chemical or physical means (epo) > Etching inorganic layer (epo) > By chemical means (epo) > By dry-etching (epo)
Description: This subclass is indented under subclass E21.251. This subclass is substantially the same in scope as ECLA classification H01L21/311B2B.










Sub-classes under this class:

Class Number Class Name Patents
257/E21.253 Of layers not containing si, e.g., pzt, al 2 o 3 (epo) 135


Patents under this class:

Patent Number Title Of Patent Date Issued
8658532 Method and material for forming a double exposure lithography pattern Feb. 25, 2014
8617979 Method for manufacturing semiconductor device and semiconductor device Dec. 31, 2013
8604562 Post CMP planarization by cluster ion beam etch Dec. 10, 2013
8598040 ETCH process for 3D flash structures Dec. 3, 2013
8568900 Methods for forming an enriched metal oxide surface Oct. 29, 2013
8546265 Method, apparatus and program for manufacturing silicon structure Oct. 1, 2013
8518777 Method for forming accumulation-mode field effect transistor with improved current capability Aug. 27, 2013
8502291 Memory cells, memory cell constructions, and memory cell programming methods Aug. 6, 2013
8501501 Measurement of a sample using multiple models Aug. 6, 2013
8492278 Method of forming a plurality of spaced features Jul. 23, 2013
8455352 Method for removing native oxide and associated residue from a substrate Jun. 4, 2013
8445296 Apparatus and methods for end point determination in reactive ion etching May. 21, 2013
8404534 End-to-end gap fill using dielectric film Mar. 26, 2013
8361275 Etching apparatus Jan. 29, 2013
8324056 Vertical type semiconductor device and method of manufacturing a vertical type semiconductor device Dec. 4, 2012
8258056 Method and material for forming a double exposure lithography pattern Sep. 4, 2012
8252659 Method for producing interconnect structures for integrated circuits Aug. 28, 2012
8211804 Methods of forming a hole having a vertical profile and semiconductor devices having a vertical hole Jul. 3, 2012
8207532 Constant and reducible hole bottom CD in variable post-CMP thickness and after-development-inspection CD Jun. 26, 2012
8180141 Wafer repair system May. 15, 2012
8148270 Low K dielectric surface damage control Apr. 3, 2012
8133814 Etch methods for semiconductor device fabrication Mar. 13, 2012
8133779 Method of fabricating a semiconductor device Mar. 13, 2012
8125069 Semiconductor device and etching apparatus Feb. 28, 2012
8124516 Trilayer resist organic layer etch Feb. 28, 2012
8119016 Removal of surface oxides by electron attachment for wafer bumping applications Feb. 21, 2012
8070972 Etching method and etching apparatus Dec. 6, 2011
8063441 Vertical type semiconductor device Nov. 22, 2011
8048806 Methods to avoid unstable plasma states during a process transition Nov. 1, 2011
8048689 Semiconductor chip with backside conductor structure Nov. 1, 2011
8017517 Dual damascene process Sep. 13, 2011
8017465 Method for manufacturing array substrate of liquid crystal display Sep. 13, 2011
8013423 Method for fabricating a metal interconnection using a dual damascene process and resulting semiconductor device Sep. 6, 2011
8008186 Semiconductor device and method of fabricating the same Aug. 30, 2011
8003522 Method for forming trenches with wide upper portion and narrow lower portion Aug. 23, 2011
7998876 Method of producing semiconductor element Aug. 16, 2011
7981800 Shallow trench isolation structures and methods for forming the same Jul. 19, 2011
7977245 Methods for etching a dielectric barrier layer with high selectivity Jul. 12, 2011
7947189 Vacuum processing apparatus and vacuum processing method of sample May. 24, 2011
7943530 Semiconductor nanowires having mobility-optimized orientations May. 17, 2011
7939436 Method of fabricating a semiconductor device May. 10, 2011
7936008 Structure and method for forming accumulation-mode field effect transistor with improved current capability May. 3, 2011
7932166 Field effect transistor having a stressed contact etch stop layer with reduced conformality Apr. 26, 2011
7915160 Methods for forming small contacts Mar. 29, 2011
7902001 Method of fabricating thin film device Mar. 8, 2011
7883632 Plasma processing method Feb. 8, 2011
7871530 Near-field optical probe based on SOI substrate and fabrication method thereof Jan. 18, 2011
7820508 Semiconductor device having capacitor and method of fabricating the same Oct. 26, 2010
7816253 Surface treatment of inter-layer dielectric Oct. 19, 2010
7808026 Dry etching method and production method of magnetic memory device Oct. 5, 2010











 
 
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