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Class Information
Number: 257/E21.252
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Processes or apparatus adapted for manufacture or treatment of semiconductor or solid-state devices or of parts thereof (epo) > Manufacture or treatment of semiconductor device (epo) > Device having at least one potential-jump barrier or surface barrier, e.g., pn junction, depletion layer, carrier concentration layer (epo) > Device having semiconductor body comprising group iv elements or group iii-v compounds with or without impurities, e.g., doping materials (epo) > Treatment of semiconductor body using process other than deposition of semiconductor material on a substrate, diffusion or alloying of impurity material, or radiation treatment (epo) > To change their surface-physical characteristics or shape, e.g., etching, polishing, cutting (epo) > To form insulating layer thereon, e.g., for masking or by using photolithographic technique (epo) > Post-treatment (epo) > Etching insulating layer by chemical or physical means (epo) > Etching inorganic layer (epo) > By chemical means (epo) > By dry-etching (epo)
Description: This subclass is indented under subclass E21.251. This subclass is substantially the same in scope as ECLA classification H01L21/311B2B.
Sub-classes under this class:
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7618887 |
Semiconductor device with a metal line and method of forming the same |
Nov. 17, 2009 |
| 7615480 |
Methods of post-contact back end of the line through-hole via integration |
Nov. 10, 2009 |
| 7601641 |
Two step optical planarizing layer etch |
Oct. 13, 2009 |
| 7592267 |
Method for manufacturing semiconductor silicon substrate and apparatus for manufacturing the same |
Sep. 22, 2009 |
| 7589006 |
Method for manufacturing semiconductor device |
Sep. 15, 2009 |
| 7585685 |
Method of determining wafer voltage in a plasma reactor from applied bias voltage and current and a pair of constants |
Sep. 8, 2009 |
| 7579250 |
Method for reducing hot carrier effect of MOS transistor |
Aug. 25, 2009 |
| 7572694 |
Method of manufacturing a semiconductor device |
Aug. 11, 2009 |
| 7569484 |
Plasma and electron beam etching device and method |
Aug. 4, 2009 |
| 7566664 |
Selective etching of MEMS using gaseous halides and reactive co-etchants |
Jul. 28, 2009 |
| 7566658 |
Method for fabricating a metal interconnection using a dual damascene process and resulting semiconductor device |
Jul. 28, 2009 |
| 7566644 |
Method for forming gate electrode of semiconductor device |
Jul. 28, 2009 |
| 7560378 |
Method for manufacturing semiconductor device |
Jul. 14, 2009 |
| 7557045 |
Manufacture of semiconductor device with good contact holes |
Jul. 7, 2009 |
| 7553679 |
Method of determining plasma ion density, wafer voltage, etch rate and wafer current from applied bias voltage and current |
Jun. 30, 2009 |
| 7547560 |
Defect identification system and method for repairing killer defects in semiconductor devices |
Jun. 16, 2009 |
| 7544625 |
Silicon oxide thin-films with embedded nanocrystalline silicon |
Jun. 9, 2009 |
| 7537987 |
Semiconductor device manufacturing method |
May. 26, 2009 |
| 7534363 |
Method for providing uniform removal of organic material |
May. 19, 2009 |
| 7528074 |
Method of manufacturing a semiconductor device and method of etching an insulating film |
May. 5, 2009 |
| 7507651 |
Method for fabricating semiconductor device with bulb shaped recess gate pattern |
Mar. 24, 2009 |
| 7504643 |
Method for cleaning a lithographic apparatus module, a cleaning arrangement and a lithographic apparatus comprising the cleaning arrangement |
Mar. 17, 2009 |
| 7504040 |
Plasma processing apparatus and plasma processing method |
Mar. 17, 2009 |
| 7501353 |
Method of formation of a damascene structure utilizing a protective film |
Mar. 10, 2009 |
| 7495239 |
Method for cleaning a lithographic apparatus module, a cleaning arrangement and a lithographic apparatus comprising the cleaning arrangement |
Feb. 24, 2009 |
| 7488687 |
Methods of forming electrical interconnect structures using polymer residues to increase etching selectivity through dielectric layers |
Feb. 10, 2009 |
| 7485963 |
Use of supercritical fluid for low effective dielectric constant metallization |
Feb. 3, 2009 |
| 7476610 |
Removable spacer |
Jan. 13, 2009 |
| 7476609 |
Forming of a cavity in an insulating layer |
Jan. 13, 2009 |
| 7473646 |
Dry etching method and production method of magnetic memory device |
Jan. 6, 2009 |
| 7452822 |
Via plug formation in dual damascene process |
Nov. 18, 2008 |
| 7442649 |
Etch with photoresist mask |
Oct. 28, 2008 |
| 7423307 |
CMOS image sensor and method for fabricating the same |
Sep. 9, 2008 |
| 7419847 |
Method for forming metal interconnection of semiconductor device |
Sep. 2, 2008 |
| 7416988 |
Semiconductor device and fabrication process thereof |
Aug. 26, 2008 |
| 7416973 |
Method of increasing the etch selectivity in a contact structure of semiconductor devices |
Aug. 26, 2008 |
| 7413963 |
Method of edge bevel rinse |
Aug. 19, 2008 |
| 7413960 |
Method of forming floating gate electrode in flash memory device |
Aug. 19, 2008 |
| 7387738 |
Removal of surface oxides by electron attachment for wafer bumping applications |
Jun. 17, 2008 |
| 7384846 |
Method of fabricating semiconductor device |
Jun. 10, 2008 |
| 7381622 |
Method for forming embedded strained drain/source regions based on a combined spacer and cavity etch process |
Jun. 3, 2008 |
| 7354867 |
Etch process for improving yield of dielectric contacts on nickel silicides |
Apr. 8, 2008 |
| 7352064 |
Multiple layer resist scheme implementing etch recipe particular to each layer |
Apr. 1, 2008 |
| 7351643 |
Method of manufacturing a semiconductor device |
Apr. 1, 2008 |
| 7338903 |
Sequential reducing plasma and inert plasma pre-treatment method for oxidizable conductor layer |
Mar. 4, 2008 |
| 7303952 |
Method for fabricating doped polysilicon lines |
Dec. 4, 2007 |
| 7282441 |
De-fluorination after via etch to preserve passivation |
Oct. 16, 2007 |
| 7268397 |
Thermal dissipation structures for finfets |
Sep. 11, 2007 |
| 7265042 |
Method for fabricating semiconductor device with gate spacer |
Sep. 4, 2007 |
| 7253116 |
High ion energy and reative species partial pressure plasma ash process |
Aug. 7, 2007 |
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