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Class Information
Number: 257/E21.249
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Processes or apparatus adapted for manufacture or treatment of semiconductor or solid-state devices or of parts thereof (epo) > Manufacture or treatment of semiconductor device (epo) > Device having at least one potential-jump barrier or surface barrier, e.g., pn junction, depletion layer, carrier concentration layer (epo) > Device having semiconductor body comprising group iv elements or group iii-v compounds with or without impurities, e.g., doping materials (epo) > Treatment of semiconductor body using process other than deposition of semiconductor material on a substrate, diffusion or alloying of impurity material, or radiation treatment (epo) > To change their surface-physical characteristics or shape, e.g., etching, polishing, cutting (epo) > To form insulating layer thereon, e.g., for masking or by using photolithographic technique (epo) > Post-treatment (epo) > Etching insulating layer by chemical or physical means (epo)
Description: This subclass is indented under subclass E21.241. This subclass is substantially the same in scope as ECLA classification H01L21/311.


Sub-classes under this class:

Class Number Class Name Patents
257/E21.25 Etching inorganic layer (epo) 70
257/E21.254 Etching organic layer (epo) 22
257/E21.257 Using mask (epo) 777


Patents under this class:

Patent Number Title Of Patent Date Issued
7407890 Patterning sub-lithographic features with variable widths Aug. 5, 2008
7405165 Dual-tank etch method for oxide thickness control Jul. 29, 2008
7361598 Method for fabricating semiconductor device capable of preventing scratch Apr. 22, 2008
7309634 Non-volatile semiconductor memory devices using prominences and trenches Dec. 18, 2007
7262488 Substrate with enhanced properties for planarization Aug. 28, 2007
7250364 Semiconductor devices with composite etch stop layers and methods of fabrication thereof Jul. 31, 2007
7226872 Lightly doped drain MOS transistor Jun. 5, 2007
7208363 Fabrication of local interconnect lines Apr. 24, 2007
7169711 Method of using carbon spacers for critical dimension (CD) reduction Jan. 30, 2007
6486073 Method for stripping a photo resist on an aluminum alloy Nov. 26, 2002
5843363 Ablation patterning of multi-layered structures Dec. 1, 1998
5795825 Connection layer forming method Aug. 18, 1998
5783482 Method to prevent oxide peeling induced by sog etchback on the wafer edge Jul. 21, 1998
4789427 Method for removing resist from semiconductor device Dec. 6, 1988
4705597 Photoresist tapering process Nov. 10, 1987
4672023 Method for planarizing wafers Jun. 9, 1987
4529860 Plasma etching of organic materials Jul. 16, 1985
4470871 Preparation of organic layers for oxygen etching Sep. 11, 1984
4201579 Method for removing photoresist by hydrogen plasma May. 6, 1980



 
 
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