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Class Information
Number: 257/E21.246
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Processes or apparatus adapted for manufacture or treatment of semiconductor or solid-state devices or of parts thereof (epo) > Manufacture or treatment of semiconductor device (epo) > Device having at least one potential-jump barrier or surface barrier, e.g., pn junction, depletion layer, carrier concentration layer (epo) > Device having semiconductor body comprising group iv elements or group iii-v compounds with or without impurities, e.g., doping materials (epo) > Treatment of semiconductor body using process other than deposition of semiconductor material on a substrate, diffusion or alloying of impurity material, or radiation treatment (epo) > To change their surface-physical characteristics or shape, e.g., etching, polishing, cutting (epo) > To form insulating layer thereon, e.g., for masking or by using photolithographic technique (epo) > Post-treatment (epo) > Planarization of insulating layer (epo) > Involving dielectric removal step (epo) > Removal by chemical etching, e.g., dry etching (epo) > Removal by selective chemical etching, e.g., selective dry etching through mask (epo)
Description: This subclass is indented under subclass E21.245. This subclass is substantially the same in scope as ECLA classification H01L21/3105B2B2.

Patents under this class:
1 2 3

Patent Number Title Of Patent Date Issued
8563371 Method of forming semiconductor device Oct. 22, 2013
8557612 Method for fabricating micro and nanostructures in a material Oct. 15, 2013
8557613 Methods for designing, fabricating, and predicting shape formations in a material Oct. 15, 2013
8557691 Method of fabricating semiconductor device having buried wiring and related device Oct. 15, 2013
8551886 CMP process for processing STI on two distinct silicon planes Oct. 8, 2013
8524604 Method for forming fine pattern of semiconductor device Sep. 3, 2013
8354345 Method for forming side contact in semiconductor device through self-aligned damascene process Jan. 15, 2013
8338306 Forming semiconductor resistors in a semiconductor device comprising metal gates by increasing etch resistivity of the resistors Dec. 25, 2012
8318570 Enhancing MOSFET performance by optimizing stress properties Nov. 27, 2012
8309460 Methods of manufacturing semiconductor devices Nov. 13, 2012
8304340 Method for manufacturing stacked contact plugs Nov. 6, 2012
8288184 Production method of semiconductor device and semiconductor device Oct. 16, 2012
8273659 Method for patterned etching of selected material Sep. 25, 2012
8124540 Hardmask trim method Feb. 28, 2012
8119535 Pitch reduced patterns relative to photolithography features Feb. 21, 2012
8110880 Systems and methods for interconnect metallization using a stop-etch layer Feb. 7, 2012
8076699 Integrated HEMT and lateral field-effect rectifier combinations, methods, and systems Dec. 13, 2011
RE42955 GaN-based permeable base transistor and method of fabrication Nov. 22, 2011
8043921 Nitride removal while protecting semiconductor surfaces for forming shallow junctions Oct. 25, 2011
7960289 Etching method, pattern forming process, thin-film transistor fabrication process, and etching solution Jun. 14, 2011
7951719 Self-masking defect removing method May. 31, 2011
7939436 Method of fabricating a semiconductor device May. 10, 2011
7888168 Solar cell contact formation process using a patterned etchant material Feb. 15, 2011
7858458 CMOS fabrication Dec. 28, 2010
7838427 Method for planarization Nov. 23, 2010
7816155 Mounted semiconductor device and a method for making the same Oct. 19, 2010
7807489 Light-emitting device with a protection layer to prevent the inter-diffusion of zinc (Zn) atoms Oct. 5, 2010
7799664 Method for selective epitaxial growth of source/drain areas Sep. 21, 2010
7786005 Method for manufacturing semiconductor device to form a via hole Aug. 31, 2010
7786017 Utilizing inverse reactive ion etching lag in double patterning contact formation Aug. 31, 2010
7651951 Pitch reduced patterns relative to photolithography features Jan. 26, 2010
7629262 Method of forming a lower electrode of a capacitor Dec. 8, 2009
7615482 Structure and method for porous SiCOH dielectric layers and adhesion promoting or etch stop layers having increased interfacial and mechanical strength Nov. 10, 2009
7595206 Manufacturing method for semiconductor light emitting device Sep. 29, 2009
7582527 Method for fabricating semiconductor device Sep. 1, 2009
7557046 Systems and methods for interconnect metallization using a stop-etch layer Jul. 7, 2009
7538028 Barrier layer, IC via, and IC line forming methods May. 26, 2009
7528059 Method for reducing polish-induced damage in a contact structure by forming a capping layer May. 5, 2009
7528075 Self-masking defect removing method May. 5, 2009
7498222 Enhanced etching of a high dielectric constant layer Mar. 3, 2009
7485582 Hardmask for improved reliability of silicon based dielectrics Feb. 3, 2009
7468321 Application of impressed-current cathodic protection to prevent metal corrosion and oxidation Dec. 23, 2008
7459370 Method of fabricating semiconductor memory device having plurality of storage node electrodes Dec. 2, 2008
7432137 Method of manufacturing thin film transistor Oct. 7, 2008
7429534 Etching a nitride-based heterostructure Sep. 30, 2008
7413958 GaN-based permeable base transistor and method of fabrication Aug. 19, 2008
7365017 Method for finishing metal line for semiconductor device Apr. 29, 2008
7344954 Method of manufacturing a capacitor deep trench and of etching a deep trench opening Mar. 18, 2008
7341935 Alternative interconnect structure for semiconductor devices Mar. 11, 2008
7335980 Hardmask for reliability of silicon based dielectrics Feb. 26, 2008

1 2 3

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