Resources Contact Us Home
Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
Browse by Category: Main > Physics
Class Information
Number: 257/E21.244
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Processes or apparatus adapted for manufacture or treatment of semiconductor or solid-state devices or of parts thereof (epo) > Manufacture or treatment of semiconductor device (epo) > Device having at least one potential-jump barrier or surface barrier, e.g., pn junction, depletion layer, carrier concentration layer (epo) > Device having semiconductor body comprising group iv elements or group iii-v compounds with or without impurities, e.g., doping materials (epo) > Treatment of semiconductor body using process other than deposition of semiconductor material on a substrate, diffusion or alloying of impurity material, or radiation treatment (epo) > To change their surface-physical characteristics or shape, e.g., etching, polishing, cutting (epo) > To form insulating layer thereon, e.g., for masking or by using photolithographic technique (epo) > Post-treatment (epo) > Planarization of insulating layer (epo) > Involving dielectric removal step (epo)
Description: This subclass is indented under subclass E21.243. This subclass is substantially the same in scope as ECLA classification H01L21/3105B2.










Sub-classes under this class:

Class Number Class Name Patents
257/E21.245 Removal by chemical etching, e.g., dry etching (epo) 304


Patents under this class:
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19

Patent Number Title Of Patent Date Issued
6617636 Nonvolatile memory structures and fabrication methods Sep. 9, 2003
6617241 Method of thick film planarization Sep. 9, 2003
6616514 High selectivity CMP slurry Sep. 9, 2003
6616717 Composition and method for polishing in metal CMP Sep. 9, 2003
6617663 Methods of manufacturing semiconductor devices Sep. 9, 2003
6613646 Methods for reduced trench isolation step height Sep. 2, 2003
6613688 Semiconductor device and process for generating an etch pattern Sep. 2, 2003
6613675 Methods, apparatuses, and substrate assembly structures for fabricating microelectronic components using mechanical and chemical-mechanical planarization processes Sep. 2, 2003
6611060 Semiconductor device having a damascene type wiring layer Aug. 26, 2003
6609954 Method of planarization Aug. 26, 2003
6610114 Oxidizing polishing slurries for low dielectric constant materials Aug. 26, 2003
6610573 Method for forming a single wiring level for transistors with planar and vertical gates on the same substrate Aug. 26, 2003
6610603 Method of manufacturing a capacitor Aug. 26, 2003
6611045 Method of forming an integrated circuit device using dummy features and structure thereof Aug. 26, 2003
6607967 Process for forming planarized isolation trench in integrated circuit structure on semiconductor substrate Aug. 19, 2003
6607950 MIS transistors with a metal gate and high-k dielectric and method of forming Aug. 19, 2003
6605517 Method for minimizing nitride residue on a silicon wafer Aug. 12, 2003
6603162 Semiconductor integrated circuit device including dummy patterns located to reduce dishing Aug. 5, 2003
6602720 Single transistor ferroelectric transistor structure with high-K insulator and method of fabricating same Aug. 5, 2003
6602725 Method of manufacturing a semiconductor device having a monitor pattern, and a semiconductor device manufactured thereby Aug. 5, 2003
6595832 Chemical mechanical polishing methods Jul. 22, 2003
6596639 Method for chemical/mechanical planarization of a semiconductor wafer having dissimilar metal pattern densities Jul. 22, 2003
6593240 Two step chemical mechanical polishing process Jul. 15, 2003
6593226 Method for adding features to a design layout and process for designing a mask Jul. 15, 2003
6593238 Method for determining an endpoint and semiconductor wafer Jul. 15, 2003
6579799 Method and apparatus for controlling chemical interactions during planarization of microelectronic substrates Jun. 17, 2003
6576552 Method for polishing semiconductor device Jun. 10, 2003
6572731 Self-siphoning CMP tool design for applications such as copper CMP and low-k dielectric CMP Jun. 3, 2003
6569769 Slurry-less chemical-mechanical polishing May. 27, 2003
6568998 Method and apparatus for uniformly planarizing a microelectronic substrate May. 27, 2003
6568996 Polishing agent for processing semiconductor, dispersant used therefor and process for preparing semiconductor device using above polishing agent for processing semiconductor May. 27, 2003
6566727 N2O nitrided-oxide trench sidewalls to prevent boron outdiffusion and decrease stress May. 20, 2003
6565736 WET PROCESS FOR SEMICONDUCTOR DEVICE FABRICATION USING ANODE WATER CONTAINING OXIDATIVE SUBSTANCES AND CATHODE WATER CONTAINING REDUCTIVE SUBSTANCES, AND ANODE WATER AND CATHODE WATER USED IN May. 20, 2003
6566242 Dual damascene copper interconnect to a damascene tungsten wiring level May. 20, 2003
6566268 Method and apparatus for planarizing a wafer surface of a semiconductor wafer having an elevated portion extending therefrom May. 20, 2003
6561876 CMP method and semiconductor manufacturing apparatus May. 13, 2003
6562692 Dielectric isolated wafer and its production method May. 13, 2003
6563148 Semiconductor device with dummy patterns May. 13, 2003
6559055 Dummy structures that protect circuit elements during polishing May. 6, 2003
6559025 Method for manufacturing a capacitor May. 6, 2003
6559056 Aqueous dispersion for chemical mechanical polishing May. 6, 2003
6560765 Method for generating mask data, mask and computer readable recording media May. 6, 2003
6555476 Silicon carbide as a stop layer in chemical mechanical polishing for isolation dielectric Apr. 29, 2003
6551922 Method for making a semiconductor device by variable chemical mechanical polish downforce Apr. 22, 2003
6551934 Process for fabricating semiconductor device and apparatus for fabricating semiconductor device Apr. 22, 2003
6552408 Methods, apparatuses, and substrate assembly structures for fabricating microelectronic components using mechanical and chemical-mechanical planarization processes Apr. 22, 2003
6548399 Method of forming a semiconductor device using a carbon doped oxide layer to control the chemical mechanical polishing of a dielectric layer Apr. 15, 2003
6548408 METHOD OF MINIMIZING REPETITIVE CHEMICAL-MECHANICAL POLISHING SCRATCH MARKS, METHOD OF PROCESSING A SEMICONDUCTOR WAFER OUTER SURFACE, METHOD OF MINIMIZING UNDESIRED NODE-TO-NODE SHORTS OF A L Apr. 15, 2003
6548407 Method and apparatus for controlling chemical interactions during planarization of microelectronic substrates Apr. 15, 2003
6540935 Chemical/mechanical polishing slurry, and chemical mechanical polishing process and shallow trench isolation process employing the same Apr. 1, 2003

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19










 
 
  Recently Added Patents
Color LED display device without color separation
Structure of circuit board and method for fabricating the same
Block polymers and their process of preparation
Tube lighting fixture
MRAM with sidewall protection and method of fabrication
Systems and methods for archiving and retrieving navigation points in a voice command platform
Sample holder and method for treating sample material
  Randomly Featured Patents
Methods for forming semiconductor structures using selectively-formed sidewall spacers
Adapter for bottom operable tank car valve
Casket
Device panel with in-molded applique
Detachable tray for stepladders
Truss panel
Method and apparatus for automatically performing an online content distribution campaign
Boost-input backed-up uninterrupted power supply
Rotor for an electric motor
Recoilless and gas-free projectile propulsion