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Class Information
Number: 257/E21.244
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Processes or apparatus adapted for manufacture or treatment of semiconductor or solid-state devices or of parts thereof (epo) > Manufacture or treatment of semiconductor device (epo) > Device having at least one potential-jump barrier or surface barrier, e.g., pn junction, depletion layer, carrier concentration layer (epo) > Device having semiconductor body comprising group iv elements or group iii-v compounds with or without impurities, e.g., doping materials (epo) > Treatment of semiconductor body using process other than deposition of semiconductor material on a substrate, diffusion or alloying of impurity material, or radiation treatment (epo) > To change their surface-physical characteristics or shape, e.g., etching, polishing, cutting (epo) > To form insulating layer thereon, e.g., for masking or by using photolithographic technique (epo) > Post-treatment (epo) > Planarization of insulating layer (epo) > Involving dielectric removal step (epo)
Description: This subclass is indented under subclass E21.243. This subclass is substantially the same in scope as ECLA classification H01L21/3105B2.










Sub-classes under this class:

Class Number Class Name Patents
257/E21.245 Removal by chemical etching, e.g., dry etching (epo) 304


Patents under this class:
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19

Patent Number Title Of Patent Date Issued
6910947 Control of chemical mechanical polishing pad conditioner directional velocity to improve pad life Jun. 28, 2005
6911686 Semiconductor memory device having planarized upper surface and a SiON moisture barrier Jun. 28, 2005
6908858 Method of fabricating semiconductor device having opening filled up with filler Jun. 21, 2005
6908361 Method of planarization of semiconductor devices Jun. 21, 2005
6908863 Sacrificial dielectric planarization layer Jun. 21, 2005
6909189 Semiconductor device with dummy structure Jun. 21, 2005
6906366 Single transistor ferroelectric transistor structure with high-k insulator Jun. 14, 2005
6905967 Method for improving planarity of shallow trench isolation using multiple simultaneous tiling systems Jun. 14, 2005
6905632 Dispersion for chemical mechanical polishing Jun. 14, 2005
6905942 Semiconductor device and method of producing the same Jun. 14, 2005
6905957 Polishing method and polishing apparatus permitting control of polishing time at a high accuracy Jun. 14, 2005
6903021 Method of polishing a semiconductor device Jun. 7, 2005
6899611 Polishing pad for a semiconductor device having a dissolvable substance May. 31, 2005
6897108 Process for planarizing array top oxide in vertical MOSFET DRAM arrays May. 24, 2005
6897121 Method of removing HDP oxide deposition May. 24, 2005
6897143 Method of manufacturing semiconductor device including two-step polishing operation for cap metal May. 24, 2005
6893968 Defect-minimizing, topology-independent planarization of process surfaces in semiconductor devices May. 17, 2005
6887137 Chemical mechanical polishing slurry and chemical mechanical polishing method using the same May. 3, 2005
6884725 Methods of forming materials within openings, and methods of forming isolation regions Apr. 26, 2005
6881660 Method for forming wiring structure Apr. 19, 2005
6878631 Abrasive used for planarization of semiconductor device and method of manufacturing semiconductor device using the abrasive Apr. 12, 2005
6875558 Integration scheme using self-planarized dielectric layer for shallow trench isolation (STI) Apr. 5, 2005
6875089 Constant pH polish and scrub Apr. 5, 2005
6869858 Shallow trench isolation planarized by wet etchback and chemical mechanical polishing Mar. 22, 2005
6866793 High selectivity and high planarity dielectric polishing Mar. 15, 2005
6867097 Method of making a memory cell with polished insulator layer Mar. 15, 2005
6863595 Methods for polishing a semiconductor topography Mar. 8, 2005
6863700 Cerium oxide abrasive and method of polishing substrates Mar. 8, 2005
6863593 Chemical mechanical polishing a substrate having a filler layer and a stop layer Mar. 8, 2005
6863592 Chemical/mechanical polishing slurry and chemical mechanical polishing method using the same Mar. 8, 2005
6861755 Semiconductor device Mar. 1, 2005
6861352 Semiconductor structure having an improved pre-metal dielectric stack and method for forming the same Mar. 1, 2005
6858549 Method for forming wiring structure Feb. 22, 2005
6858538 Methods and apparatuses for monitoring and controlling mechanical or chemical-mechanical planarization of microelectronic substrate assemblies Feb. 22, 2005
6855607 Multi-step chemical mechanical polishing of a gate area in a FinFET Feb. 15, 2005
6849099 Polishing composition Feb. 1, 2005
6844262 CMP process Jan. 18, 2005
6841480 Polyelectrolyte dispensing polishing pad, production thereof and method of polishing a substrate Jan. 11, 2005
6841479 Method of reducing in-trench smearing during polishing Jan. 11, 2005
6835121 Chemical-mechanical polishing methods Dec. 28, 2004
6833324 Process and device for cleaning a semiconductor wafer Dec. 21, 2004
6833232 Micro-pattern forming method for semiconductor device Dec. 21, 2004
6833622 Semiconductor topography having an inactive region formed from a dummy structure pattern Dec. 21, 2004
6831015 Fabrication method of semiconductor device and abrasive liquid used therein Dec. 14, 2004
6827633 Polishing method Dec. 7, 2004
6827752 Cerium oxide slurry, and method of manufacturing substrate Dec. 7, 2004
6828227 Method for applying uniform pressurized film across wafer Dec. 7, 2004
6828636 Semiconductor device isolated resistive zone Dec. 7, 2004
6824579 Selective polishing with slurries containing polyelectrolytes Nov. 30, 2004
6825116 Method for removing structures Nov. 30, 2004

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