Resources Contact Us Home
Browse by Category: Main > Physics
Class Information
Number: 257/E21.244
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Processes or apparatus adapted for manufacture or treatment of semiconductor or solid-state devices or of parts thereof (epo) > Manufacture or treatment of semiconductor device (epo) > Device having at least one potential-jump barrier or surface barrier, e.g., pn junction, depletion layer, carrier concentration layer (epo) > Device having semiconductor body comprising group iv elements or group iii-v compounds with or without impurities, e.g., doping materials (epo) > Treatment of semiconductor body using process other than deposition of semiconductor material on a substrate, diffusion or alloying of impurity material, or radiation treatment (epo) > To change their surface-physical characteristics or shape, e.g., etching, polishing, cutting (epo) > To form insulating layer thereon, e.g., for masking or by using photolithographic technique (epo) > Post-treatment (epo) > Planarization of insulating layer (epo) > Involving dielectric removal step (epo)
Description: This subclass is indented under subclass E21.243. This subclass is substantially the same in scope as ECLA classification H01L21/3105B2.

Sub-classes under this class:

Class Number Class Name Patents
257/E21.245 Removal by chemical etching, e.g., dry etching (epo) 304

Patents under this class:
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19

Patent Number Title Of Patent Date Issued
5744400 Apparatus and method for dry milling of non-planar features on a semiconductor surface Apr. 28, 1998
5736462 Method of etching back layer on substrate Apr. 7, 1998
5736463 Method and apparatus for chemical/mechanical polishing Apr. 7, 1998
5733818 Method for fabricating semiconductor device with planarization step using CMP Mar. 31, 1998
5728308 Method of polishing a semiconductor substrate during production of a semiconductor device Mar. 17, 1998
5728453 Method of fabricating topside structure of a semiconductor device Mar. 17, 1998
5728507 Method for planarizing a semiconductor layer Mar. 17, 1998
5726084 Method for forming integrated circuit structure Mar. 10, 1998
5726099 Method of chemically mechanically polishing an electronic component using a non-selective ammonium persulfate slurry Mar. 10, 1998
5721172 Self-aligned polish stop layer hard masking method for forming planarized aperture fill layers Feb. 24, 1998
5718618 Lapping and polishing method and apparatus for planarizing photoresist and metal microstructure layers Feb. 17, 1998
5705028 Method of manufacturing a semiconductor device with flattened multi-layer wirings Jan. 6, 1998
5704987 Process for removing residue from a semiconductor wafer after chemical-mechanical polishing Jan. 6, 1998
5705435 Chemical-mechanical polishing (CMP) apparatus Jan. 6, 1998
5702563 Reduced chemical-mechanical polishing particulate contamination Dec. 30, 1997
5700348 Method of polishing semiconductor substrate Dec. 23, 1997
5698467 Method of manufacturing an insulation layer having a flat surface Dec. 16, 1997
5696028 Method to form an insulative barrier useful in field emission displays for reducing surface leakage Dec. 9, 1997
5691237 Method for fabricating semiconductor device Nov. 25, 1997
5688364 Chemical-mechanical polishing method and apparatus using ultrasound applied to the carrier and platen Nov. 18, 1997
5688720 Method of flattening the surface of a semiconductor device by polishing Nov. 18, 1997
5685947 Chemical-mechanical polishing with an embedded abrasive Nov. 11, 1997
5686356 Conductor reticulation for improved device planarity Nov. 11, 1997
5674784 Method for forming polish stop layer for CMP process Oct. 7, 1997
5674783 Method for improving the chemical-mechanical polish (CMP) uniformity of insulator layers Oct. 7, 1997
5672538 Modified locus isolation process in which surface topology of the locos oxide is smoothed Sep. 30, 1997
5672539 Method for forming an improved field isolation structure using ozone enhanced oxidation and tapering Sep. 30, 1997
5667424 New chemical mechanical planarization (CMP) end point detection apparatus Sep. 16, 1997
5665202 Multi-step planarization process using polishing at two different pad pressures Sep. 9, 1997
5665201 High removal rate chemical-mechanical polishing Sep. 9, 1997
5665199 Methodology for developing product-specific interlayer dielectric polish processes Sep. 9, 1997
5663086 Method of forming a semiconductor device having CMOS structures on a semiconductor substrate Sep. 2, 1997
5645675 Selective planarization apparatus Jul. 8, 1997
5645736 Method for polishing a wafer Jul. 8, 1997
5643837 Method of flattening the surface of a semiconductor device by polishing Jul. 1, 1997
5639697 Dummy underlayers for improvement in removal rate consistency during chemical mechanical polishing Jun. 17, 1997
5635083 Method and apparatus for chemical-mechanical polishing using pneumatic pressure applied to the backside of a substrate Jun. 3, 1997
5631197 Sacrificial etchback layer for improved spin-on-glass planarization May. 20, 1997
5629224 Resist/etchback planarizing techniques for fabricating semiconductor devices based on CMOS structures May. 13, 1997
5629242 Process for planarizing surface of a semiconductor device May. 13, 1997
5627110 Method for eliminating window mask process in the fabrication of a semiconductor wafer when chemical-mechanical polish planarization is used May. 6, 1997
5627104 Method to improve interlevel dielectric planarization using SOG May. 6, 1997
5626715 Methods of polishing semiconductor substrates May. 6, 1997
5623164 Integrated semiconductor circuit or micromechanical component and process therefore Apr. 22, 1997
5618757 Method for improving the manufacturability of the spin-on glass etchback process Apr. 8, 1997
5599740 Deposit-etch-deposit ozone/teos insulator layer method Feb. 4, 1997
5597341 Semiconductor planarizing apparatus Jan. 28, 1997
5597442 Chemical/mechanical planarization (CMP) endpoint method using measurement of polishing pad temperature Jan. 28, 1997
5597764 Method of contact formation and planarization for semiconductor processes Jan. 28, 1997
5580826 Process for forming a planarized interlayer insulating film in a semiconductor device using a periodic resist pattern Dec. 3, 1996

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19

  Recently Added Patents
Wine bottle
Device for increasing chip testing efficiency and method thereof
Method to prevent hyper frame number de-synchronization in a wireless communication system
Quantifying the risks of applications for mobile devices
Plants and seeds of corn variety CV092363
Data transfer operation completion detection circuit and semiconductor memory device provided therewith
Method for detecting security error in mobile telecommunications system and device of mobile telecommunications
  Randomly Featured Patents
Dielectric resonator apparatus comprising at least three quarter-wavelength dielectric coaxial resonators and having capacitance coupling electrodes
Therapeutic medical garments with silicone sheeting component for scar treatment, process of manufacture and use
Chewing gum containing a medicament and taste maskers
Wide band multicore optical fiber
Method and apparatus for diodegradable, osteogenic, bone graft substitute device
Curved blade for wind turbines
Process and apparatus for recovery of lead shot, bullets and slugs from firing ranges
Adjustable rake for feed material with multiple width adjustment
System and method for dynamic assembly of packages in retail environments
Process for the reduction of dyes