Resources Contact Us Home
Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
Browse by Category: Main > Physics
Class Information
Number: 257/E21.244
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Processes or apparatus adapted for manufacture or treatment of semiconductor or solid-state devices or of parts thereof (epo) > Manufacture or treatment of semiconductor device (epo) > Device having at least one potential-jump barrier or surface barrier, e.g., pn junction, depletion layer, carrier concentration layer (epo) > Device having semiconductor body comprising group iv elements or group iii-v compounds with or without impurities, e.g., doping materials (epo) > Treatment of semiconductor body using process other than deposition of semiconductor material on a substrate, diffusion or alloying of impurity material, or radiation treatment (epo) > To change their surface-physical characteristics or shape, e.g., etching, polishing, cutting (epo) > To form insulating layer thereon, e.g., for masking or by using photolithographic technique (epo) > Post-treatment (epo) > Planarization of insulating layer (epo) > Involving dielectric removal step (epo)
Description: This subclass is indented under subclass E21.243. This subclass is substantially the same in scope as ECLA classification H01L21/3105B2.










Sub-classes under this class:

Class Number Class Name Patents
257/E21.245 Removal by chemical etching, e.g., dry etching (epo) 304


Patents under this class:
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19

Patent Number Title Of Patent Date Issued
5962343 Process for producing crystalline ceric oxide particles and abrasive Oct. 5, 1999
5963837 Method of planarizing the semiconductor structure Oct. 5, 1999
5960317 Methods of forming electrical interconnects on integrated circuit substrates using selective slurries Sep. 28, 1999
5958794 Method of modifying an exposed surface of a semiconductor wafer Sep. 28, 1999
5958795 Chemical-mechanical polishing for shallow trench isolation Sep. 28, 1999
5954888 Post-CMP wet-HF cleaning station Sep. 21, 1999
5952243 Removal rate behavior of spin-on dielectrics with chemical mechanical polish Sep. 14, 1999
5952241 Method and apparatus for improving alignment for metal masking in conjuction with oxide and tungsten CMP Sep. 14, 1999
5951724 Fine particulate polishing agent, method for producing the same and method for producing semiconductor devices Sep. 14, 1999
5953635 Interlayer dielectric with a composite dielectric stack Sep. 14, 1999
5948573 Method of designing mask pattern to be formed in mask and method of manufacturing integrated circuit Sep. 7, 1999
5948697 Catalytic acceleration and electrical bias control of CMP processing Sep. 7, 1999
5948698 Manufacturing method of semiconductor device using chemical mechanical polishing Sep. 7, 1999
5948700 Method of planarization of an intermetal dielectric layer using chemical mechanical polishing Sep. 7, 1999
5946592 Combined in-situ high density plasma enhanced chemical vapor deposition (HDPCVD) and chemical mechanical polishing (CMP) process to form an intermetal dielectric layer with a stopper layer emb Aug. 31, 1999
5946583 Method for preventing alignment marks from disappearing after chemical mechanical polishing Aug. 31, 1999
5943590 Method for improving the planarity of shallow trench isolation Aug. 24, 1999
5934980 Method of chemical mechanical polishing Aug. 10, 1999
5937300 Semiconductor apparatus and fabrication method thereof Aug. 10, 1999
5933744 Alignment method for used in chemical mechanical polishing process Aug. 3, 1999
5932487 Method for forming a planar intermetal dielectric layer Aug. 3, 1999
5928962 Process for forming a semiconductor device Jul. 27, 1999
5928960 Process for reducing pattern factor effects in CMP planarization Jul. 27, 1999
5928959 Dishing resistance Jul. 27, 1999
5930644 Method of forming a shallow trench isolation using oxide slope etching Jul. 27, 1999
5930646 Method of shallow trench isolation Jul. 27, 1999
5928961 Dishing inhibited shallow trench isolation Jul. 27, 1999
5926713 Method for achieving global planarization by forming minimum mesas in large field areas Jul. 20, 1999
5926722 Planarization of shallow trench isolation by differential etchback and chemical mechanical polishing Jul. 20, 1999
5922136 Post-CMP cleaner apparatus and method Jul. 13, 1999
5920792 High density plasma enhanced chemical vapor deposition process in combination with chemical mechanical polishing process for preparation and planarization of intemetal dielectric layers Jul. 6, 1999
5916453 Methods of planarizing structures on wafers and substrates by polishing Jun. 29, 1999
5914275 Polishing apparatus and method for planarizing layer on a semiconductor wafer Jun. 22, 1999
5911108 Method for protecting an alignment mark on a semiconductor substrate during chemical mechanical polishing and the resulting structure Jun. 8, 1999
5910022 Method and system for tungsten chemical mechanical polishing for unplanarized dielectric surfaces Jun. 8, 1999
5904557 Method for forming multilevel interconnection of semiconductor device May. 18, 1999
5904558 Fabrication process of semiconductor device May. 18, 1999
5905289 Planarized metallurgy structure for a semiconductor and process of fabrication May. 18, 1999
5902752 Active layer mask with dummy pattern May. 11, 1999
5896870 Method of removing slurry particles Apr. 27, 1999
5895550 Ultrasonic processing of chemical mechanical polishing slurries Apr. 20, 1999
5895961 Semiconductor device with a planarized interconnect with poly-plug and self-aligned contacts Apr. 20, 1999
5893750 Method for forming a highly planarized interlevel dielectric structure Apr. 13, 1999
5894168 Mask generation technique for producing an integrated circuit with optimal polysilicon interconnect layout for achieving global planarization Apr. 13, 1999
5893754 Method for chemical-mechanical planarization of stop-on-feature semiconductor wafers Apr. 13, 1999
5891205 Chemical mechanical polishing composition Apr. 6, 1999
5888900 Method for manufacturing semiconductor device and reticle for wiring Mar. 30, 1999
5885900 Method of global planarization in fabricating integrated circuit devices Mar. 23, 1999
5885894 Method of planarizing an inter-layer dielectric layer Mar. 23, 1999
5885856 Integrated circuit having a dummy structure and method of making Mar. 23, 1999

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19










 
 
  Recently Added Patents
Thermoplastic resin composition
Generation of uniform fragments of nucleic acids using patterned substrates
System and method for reducing the risks involved in trading multiple spread trading strategies
Case for electronic device
Automatic search system and method
Fabrication of high gradient insulators by stack compression
Methods of modulating interleukin-22 and immune response by notch regulators
  Randomly Featured Patents
Scanning technology
Audio-signal time-axis expansion/compression method and device
Take-out assembly for blow molding machine
Multi-use telephone test sets and related systems
Slip stop rubber sheet and slip-stop rubber sheet lined work gloves
Copolymer production
Intelligent orthosis
Clamping and cutting apparatus with interchangeable heads
5-Phenyl-7-chloro-1H-1,5-benzodiazepine-2,4-(3H,5H)-diones
Semiconductor device, wiring substrate forming method, and substrate processing apparatus