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Class Information
Number: 257/E21.244
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Processes or apparatus adapted for manufacture or treatment of semiconductor or solid-state devices or of parts thereof (epo) > Manufacture or treatment of semiconductor device (epo) > Device having at least one potential-jump barrier or surface barrier, e.g., pn junction, depletion layer, carrier concentration layer (epo) > Device having semiconductor body comprising group iv elements or group iii-v compounds with or without impurities, e.g., doping materials (epo) > Treatment of semiconductor body using process other than deposition of semiconductor material on a substrate, diffusion or alloying of impurity material, or radiation treatment (epo) > To change their surface-physical characteristics or shape, e.g., etching, polishing, cutting (epo) > To form insulating layer thereon, e.g., for masking or by using photolithographic technique (epo) > Post-treatment (epo) > Planarization of insulating layer (epo) > Involving dielectric removal step (epo)
Description: This subclass is indented under subclass E21.243. This subclass is substantially the same in scope as ECLA classification H01L21/3105B2.
Sub-classes under this class:
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7601607 |
Protruded contact and insertion of inter-layer-dielectric material to match damascene hardmask to improve undercut for low-k interconnects |
Oct. 13, 2009 |
| 7575995 |
Method of forming fine metal pattern and method of forming metal line using the same |
Aug. 18, 2009 |
| 7572697 |
Method of manufacturing flash memory device |
Aug. 11, 2009 |
| 7564114 |
Semiconductor devices and methods of manufacture thereof |
Jul. 21, 2009 |
| 7560329 |
Semiconductor device and method for fabricating the same |
Jul. 14, 2009 |
| 7544618 |
Two-step chemical mechanical polishing process |
Jun. 9, 2009 |
| 7537971 |
Method for fabricating CMOS image sensor |
May. 26, 2009 |
| 7528059 |
Method for reducing polish-induced damage in a contact structure by forming a capping layer |
May. 5, 2009 |
| 7510972 |
Method of processing substrate, post-chemical mechanical polishing cleaning method, and method of and program for manufacturing electronic device |
Mar. 31, 2009 |
| 7459720 |
Single crystal wafer and solar battery cell |
Dec. 2, 2008 |
| 7419909 |
Methods of forming a semiconductor device that allow patterns in different regions that have different pitches to be connected |
Sep. 2, 2008 |
| 7396737 |
Method of forming shallow trench isolation |
Jul. 8, 2008 |
| 7393737 |
Semiconductor device and a method of manufacturing the same |
Jul. 1, 2008 |
| 7393789 |
Protective coating for planarization |
Jul. 1, 2008 |
| 7361598 |
Method for fabricating semiconductor device capable of preventing scratch |
Apr. 22, 2008 |
| 7358587 |
Semiconductor structures |
Apr. 15, 2008 |
| 7358196 |
Wet chemical treatment to form a thin oxide for high k gate dielectrics |
Apr. 15, 2008 |
| 7338905 |
Semiconductor device manufacture method |
Mar. 4, 2008 |
| 7282434 |
Method of manufacturing a semiconductor device |
Oct. 16, 2007 |
| 7276426 |
Methods of forming semiconductor constructions |
Oct. 2, 2007 |
| 7271100 |
Slurry composition, polishing method using the slurry composition and method of forming a gate pattern using the slurry composition |
Sep. 18, 2007 |
| 7148103 |
Multilevel poly-Si tiling for semiconductor circuit manufacture |
Dec. 12, 2006 |
| 7074625 |
Semiconductor device and method of manufacturing the same |
Jul. 11, 2006 |
| 7071074 |
Structure and method for placement, sizing and shaping of dummy structures |
Jul. 4, 2006 |
| 7071105 |
Method of polishing a silicon-containing dielectric |
Jul. 4, 2006 |
| 7071106 |
Method for CMP removal rate compensation |
Jul. 4, 2006 |
| 7066790 |
Chemical-mechanical polishing methods |
Jun. 27, 2006 |
| 7064053 |
Process for fabricating an electrical circuit comprising a polishing step |
Jun. 20, 2006 |
| 7061068 |
Shallow trench isolation structures having uniform and smooth topography |
Jun. 13, 2006 |
| 7052997 |
Method to form etch and/or CMP stop layers |
May. 30, 2006 |
| 7052625 |
Slurry and use thereof for polishing |
May. 30, 2006 |
| 7048612 |
Method of chemical mechanical polishing |
May. 23, 2006 |
| 7045073 |
Pre-etch implantation damage for the removal of thin film layers |
May. 16, 2006 |
| 7045435 |
Shallow trench isolation method for a semiconductor wafer |
May. 16, 2006 |
| 7040956 |
Control of chemical mechanical polishing pad conditioner directional velocity to improve pad life |
May. 9, 2006 |
| 7040966 |
Carbonation of pH controlled KOH solution for improved polishing of oxide films on semiconductor wafers |
May. 9, 2006 |
| 7041600 |
Methods of planarization |
May. 9, 2006 |
| 7037821 |
Method for forming contact of semiconductor device |
May. 2, 2006 |
| 7037179 |
Methods and apparatuses for making and using planarizing pads for mechanical and chemical-mechanical planarization of microelectronic substrates |
May. 2, 2006 |
| 7037840 |
Methods of forming planarized surfaces over semiconductor substrates |
May. 2, 2006 |
| 7033943 |
Etching solution, etching method and method for manufacturing semiconductor device |
Apr. 25, 2006 |
| 7033941 |
Method of producing semiconductor devices using chemical mechanical polishing |
Apr. 25, 2006 |
| 7034367 |
Semiconductor device having an STI structure and a dummy pattern with a rectangular shape |
Apr. 25, 2006 |
| 7029509 |
CMP slurry composition and a method for planarizing semiconductor device using the same |
Apr. 18, 2006 |
| 7029596 |
Computer integrated manufacturing control system for oxide chemical mechanical polishing |
Apr. 18, 2006 |
| 7030017 |
Method for the planarization of a semiconductor structure |
Apr. 18, 2006 |
| 7026245 |
Polishing agent and polishing method |
Apr. 11, 2006 |
| 7018560 |
Composition for polishing semiconductor layers |
Mar. 28, 2006 |
| 7018924 |
CMP slurry compositions for oxide films and methods for forming metal line contact plugs using the same |
Mar. 28, 2006 |
| 7017133 |
Designing a semiconductor device layout using polishing regions |
Mar. 21, 2006 |
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