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Class Information
Number: 257/E21.243
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Processes or apparatus adapted for manufacture or treatment of semiconductor or solid-state devices or of parts thereof (epo) > Manufacture or treatment of semiconductor device (epo) > Device having at least one potential-jump barrier or surface barrier, e.g., pn junction, depletion layer, carrier concentration layer (epo) > Device having semiconductor body comprising group iv elements or group iii-v compounds with or without impurities, e.g., doping materials (epo) > Treatment of semiconductor body using process other than deposition of semiconductor material on a substrate, diffusion or alloying of impurity material, or radiation treatment (epo) > To change their surface-physical characteristics or shape, e.g., etching, polishing, cutting (epo) > To form insulating layer thereon, e.g., for masking or by using photolithographic technique (epo) > Post-treatment (epo) > Planarization of insulating layer (epo)
Description: This subclass is indented under subclass E21.241. This subclass is substantially the same in scope as ECLA classification H01L21/3105B.










Sub-classes under this class:

Class Number Class Name Patents
257/E21.244 Involving dielectric removal step (epo) 942


Patents under this class:
1 2 3 4 5 6

Patent Number Title Of Patent Date Issued
5976973 Method of making a semiconductor device having planarized insulating layer Nov. 2, 1999
5963837 Method of planarizing the semiconductor structure Oct. 5, 1999
5935334 Substrate processing apparatus with bottom-mounted remote plasma system Aug. 10, 1999
5932490 Integrated circuitry having a pair of adjacent conductive lines and method of forming Aug. 3, 1999
5930646 Method of shallow trench isolation Jul. 27, 1999
5918152 Gap filling method using high pressure Jun. 29, 1999
5918142 Method for fabricating a semiconductor device Jun. 29, 1999
5915175 Mitigation of CMP-induced BPSG surface damage by an integrated anneal and silicon dioxide deposition Jun. 22, 1999
5913131 Alternative process for BPTEOS/BPSG layer formation Jun. 15, 1999
5910017 Increasing uniformity in a refill layer thickness for a semiconductor device Jun. 8, 1999
5908672 Method and apparatus for depositing a planarized passivation layer Jun. 1, 1999
5899751 Method for forming a planarized dielectric layer May. 4, 1999
5900072 Insulating layer structure for semiconductor device May. 4, 1999
5897358 Semiconductor device having fluorine-enhanced transistor with elevated active regions and fabrication thereof Apr. 27, 1999
5888909 Method of forming interlayer film Mar. 30, 1999
5888911 HSQ processing for reduced dielectric constant Mar. 30, 1999
5888910 Method for forming interlayer insulating film of semiconductor devices Mar. 30, 1999
5872052 Planarization using plasma oxidized amorphous silicon Feb. 16, 1999
5869387 Process for producing semiconductor substrate by heating to flatten an unpolished surface Feb. 9, 1999
5861345 In-situ pre-PECVD oxide deposition process for treating SOG Jan. 19, 1999
5861342 Optimized structures for dummy fill mask design Jan. 19, 1999
5858475 Acoustic wave enhanced spin coating method Jan. 12, 1999
5858832 Method for forming a high areal capacitance planar capacitor Jan. 12, 1999
5851319 Method and apparatus for selectively annealing heterostructures using microwaves Dec. 22, 1998
5840609 Method of manufacturing semiconductor device having stacked gate electrode structure Nov. 24, 1998
5837603 Planarization method by use of particle dispersion and subsequent thermal flow Nov. 17, 1998
5837613 Enhanced planarization technique for an integrated circuit Nov. 17, 1998
5837610 Chemical mechanical polishing (CMP) apparatus and CMP method using the same Nov. 17, 1998
5796122 Method for planarizing wide bandgap semiconductor devices Aug. 18, 1998
5783484 Insulating layer planarizing method for semiconductor device using mutually engaged insulating layers to improve strength and thermal deformation Jul. 21, 1998
5766803 Mask generation technique for producing an integrated circuit with optimal metal interconnect layout for achieving global planarization Jun. 16, 1998
5744397 Method of planarizing an insulating layer Apr. 28, 1998
5736424 Device fabrication involving planarization Apr. 7, 1998
5733818 Method for fabricating semiconductor device with planarization step using CMP Mar. 31, 1998
5714417 Planarization process using artificial gravity Feb. 3, 1998
5710461 SRAM cell fabrication with interlevel dielectric planarization Jan. 20, 1998
5707466 Method and apparatus for selectively annealing heterostructures using microwave Jan. 13, 1998
5707683 Electronic coating composition method of coating an electronic substrate, composition and article Jan. 13, 1998
5705028 Method of manufacturing a semiconductor device with flattened multi-layer wirings Jan. 6, 1998
5698473 Method for forming a silane based boron phosphorous silicate planarization structure Dec. 16, 1997
5691236 Method and apparatus for performing chemical vapor deposition Nov. 25, 1997
5679610 Method of planarizing a semiconductor workpiece surface Oct. 21, 1997
5677241 Integrated circuitry having a pair of adjacent conductive lines and method of forming Oct. 14, 1997
5674773 Method for planarizing high step-height integrated circuit structures Oct. 7, 1997
5668063 Method of planarizing a layer of material Sep. 16, 1997
5656337 Method of forming a dielectric layer Aug. 12, 1997
5646071 Equipment and method for applying a liquid layer Jul. 8, 1997
5640038 Integrated circuit structure with self-planarized layers Jun. 17, 1997
5633208 Planarization of insulation film using low wettingness surface May. 27, 1997
5629242 Process for planarizing surface of a semiconductor device May. 13, 1997

1 2 3 4 5 6










 
 
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