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Class Information
Number: 257/E21.243
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Processes or apparatus adapted for manufacture or treatment of semiconductor or solid-state devices or of parts thereof (epo) > Manufacture or treatment of semiconductor device (epo) > Device having at least one potential-jump barrier or surface barrier, e.g., pn junction, depletion layer, carrier concentration layer (epo) > Device having semiconductor body comprising group iv elements or group iii-v compounds with or without impurities, e.g., doping materials (epo) > Treatment of semiconductor body using process other than deposition of semiconductor material on a substrate, diffusion or alloying of impurity material, or radiation treatment (epo) > To change their surface-physical characteristics or shape, e.g., etching, polishing, cutting (epo) > To form insulating layer thereon, e.g., for masking or by using photolithographic technique (epo) > Post-treatment (epo) > Planarization of insulating layer (epo)
Description: This subclass is indented under subclass E21.241. This subclass is substantially the same in scope as ECLA classification H01L21/3105B.
Sub-classes under this class:
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7399649 |
Semiconductor light-emitting device and fabrication method thereof |
Jul. 15, 2008 |
| 7396737 |
Method of forming shallow trench isolation |
Jul. 8, 2008 |
| 7384827 |
Method of manufacturing semiconductor device using liquid phase deposition of an interlayer dielectric |
Jun. 10, 2008 |
| 7332405 |
Method of forming alignment marks for semiconductor device fabrication |
Feb. 19, 2008 |
| 7262488 |
Substrate with enhanced properties for planarization |
Aug. 28, 2007 |
| 7247571 |
Method for planarizing semiconductor structures |
Jul. 24, 2007 |
| 7226854 |
Methods of forming metal lines in semiconductor devices |
Jun. 5, 2007 |
| 7148103 |
Multilevel poly-Si tiling for semiconductor circuit manufacture |
Dec. 12, 2006 |
| 7141514 |
Selective plasma re-oxidation process using pulsed RF source power |
Nov. 28, 2006 |
| 7070659 |
System for filling openings in semiconductor products |
Jul. 4, 2006 |
| 7060323 |
Method of forming interlayer insulating film |
Jun. 13, 2006 |
| 7053005 |
Method of forming a silicon oxide layer in a semiconductor manufacturing process |
May. 30, 2006 |
| 6949389 |
Encapsulation for organic light emitting diodes devices |
Sep. 27, 2005 |
| 6911667 |
Encapsulation for organic electronic devices |
Jun. 28, 2005 |
| 6905907 |
Light emitting device and manufacturing method thereof |
Jun. 14, 2005 |
| 6905980 |
Semiconductor device and method of manufacturing same |
Jun. 14, 2005 |
| 6872418 |
Film forming method |
Mar. 29, 2005 |
| 6861352 |
Semiconductor structure having an improved pre-metal dielectric stack and method for forming the same |
Mar. 1, 2005 |
| 6849553 |
Method of manufacturing semiconductor device |
Feb. 1, 2005 |
| 6835590 |
Method of manufacturing image sensor for reducing dark current |
Dec. 28, 2004 |
| 6821577 |
Staggered in-situ deposition and etching of a dielectric layer for HDP CVD |
Nov. 23, 2004 |
| 6809031 |
Method for manufacturing a reclaimable test pattern wafer for CMP applications |
Oct. 26, 2004 |
| 6805807 |
Adaptive GCIB for smoothing surfaces |
Oct. 19, 2004 |
| 6803315 |
Method for blocking implants from the gate of an electronic device via planarizing films |
Oct. 12, 2004 |
| 6797607 |
Contact planarization using nanoporous silica materials |
Sep. 28, 2004 |
| 6777346 |
Planarization using plasma oxidized amorphous silicon |
Aug. 17, 2004 |
| 6767475 |
Chemical-organic planarization process for atomically smooth interfaces |
Jul. 27, 2004 |
| 6753607 |
Structure for improving interlevel conductor connections |
Jun. 22, 2004 |
| 6749765 |
Aperture fill |
Jun. 15, 2004 |
| 6743728 |
Method for forming shallow trench isolation |
Jun. 1, 2004 |
| 6716767 |
Contact planarization materials that generate no volatile byproducts or residue during curing |
Apr. 6, 2004 |
| 6707134 |
Semiconductor structure having an improved pre-metal dielectric stack and method for forming the same |
Mar. 16, 2004 |
| 6703321 |
Low thermal budget solution for PMD application using sacvd layer |
Mar. 9, 2004 |
| 6690044 |
Approach to avoid buckling BPSG by using an intermediate barrier layer |
Feb. 10, 2004 |
| 6677252 |
Methods for planarization of non-planar surfaces in device fabrication |
Jan. 13, 2004 |
| 6660177 |
Apparatus and method for reactive atom plasma processing for material deposition |
Dec. 9, 2003 |
| 6660627 |
Method for planarization of wafers with high selectivities |
Dec. 9, 2003 |
| 6638878 |
Film planarization for low-k polymers used in semiconductor structures |
Oct. 28, 2003 |
| 6630739 |
Planarization structure and method for dielectric layers |
Oct. 7, 2003 |
| 6627549 |
Methods for making nearly planar dielectric films in integrated circuits |
Sep. 30, 2003 |
| 6620534 |
Film having enhanced reflow characteristics at low thermal budget |
Sep. 16, 2003 |
| 6589889 |
Contact planarization using nanoporous silica materials |
Jul. 8, 2003 |
| 6558756 |
Method of forming interlayer insulating film |
May. 6, 2003 |
| 6555910 |
Use of small openings in large topography features to improve dielectric thickness control and a method of manufacture thereof |
Apr. 29, 2003 |
| 6544858 |
Method for treating silicon-containing polymer layers with plasma or electromagnetic radiation |
Apr. 8, 2003 |
| 6541401 |
Wafer pretreatment to decrease rate of silicon dioxide deposition on silicon nitride compared to silicon substrate |
Apr. 1, 2003 |
| 6541085 |
Tubular molded product using nylon 12 |
Apr. 1, 2003 |
| 6532772 |
Formation of planar dielectric layers using liquid interfaces |
Mar. 18, 2003 |
| 6527910 |
Staggered in-situ deposition and etching of a dielectric layer for HDP-CVD |
Mar. 4, 2003 |
| 6514882 |
Aggregate dielectric layer to reduce nitride consumption |
Feb. 4, 2003 |
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