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Class Information
Number: 257/E21.232
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Processes or apparatus adapted for manufacture or treatment of semiconductor or solid-state devices or of parts thereof (epo) > Manufacture or treatment of semiconductor device (epo) > Device having at least one potential-jump barrier or surface barrier, e.g., pn junction, depletion layer, carrier concentration layer (epo) > Device having semiconductor body comprising group iv elements or group iii-v compounds with or without impurities, e.g., doping materials (epo) > Treatment of semiconductor body using process other than deposition of semiconductor material on a substrate, diffusion or alloying of impurity material, or radiation treatment (epo) > To change their surface-physical characteristics or shape, e.g., etching, polishing, cutting (epo) > Chemical or electrical treatment, e.g., electrolytic etching (epo) > Using mask (epo) > Characterized by their composition, e.g., multilayer masks, materials (epo)
Description: This subclass is indented under subclass E21.231. This subclass is substantially the same in scope as ECLA classification H01L21/308B.
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7378738 |
Method for producing self-aligned mask, articles produced by same and composition for same |
May. 27, 2008 |
| 7358102 |
Method for fabricating microelectromechanical optical display devices |
Apr. 15, 2008 |
| 7319073 |
Method of reducing silicon damage around laser marking region of wafers in STI CMP process |
Jan. 15, 2008 |
| 7307014 |
Method of forming a via contact structure using a dual damascene process |
Dec. 11, 2007 |
| 7288486 |
Method for manufacturing semiconductor device having via holes |
Oct. 30, 2007 |
| 7282455 |
Method of producing a diffraction grating |
Oct. 16, 2007 |
| 7250371 |
Reduction of feature critical dimensions |
Jul. 31, 2007 |
| 7241698 |
Method for sensor edge and mask height control for narrow track width devices |
Jul. 10, 2007 |
| 7241697 |
Method for sensor edge control and track width definition for narrow track width devices |
Jul. 10, 2007 |
| 7115993 |
Structure comprising amorphous carbon film and method of forming thereof |
Oct. 3, 2006 |
| 7064078 |
Techniques for the use of amorphous carbon (APF) for various etch and litho integration scheme |
Jun. 20, 2006 |
| 7064080 |
Semiconductor processing method using photoresist and an antireflective coating |
Jun. 20, 2006 |
| 7045407 |
Amorphous etch stop for the anisotropic etching of substrates |
May. 16, 2006 |
| 7033936 |
Process for making island arrays |
Apr. 25, 2006 |
| 7029753 |
Multi-layer hard mask structure for etching deep trench in substrate |
Apr. 18, 2006 |
| 7022616 |
High speed silicon etching method |
Apr. 4, 2006 |
| 7022615 |
Plasma processing method |
Apr. 4, 2006 |
| 7015139 |
Two-dimensionally arrayed quantum device |
Mar. 21, 2006 |
| 6998348 |
Method for manufacturing electronic circuits integrated on a semiconductor substrate |
Feb. 14, 2006 |
| 6979651 |
Method for forming alignment features and back-side contacts with fewer lithography and etch steps |
Dec. 27, 2005 |
| 6974741 |
Method for forming shallow trench in semiconductor device |
Dec. 13, 2005 |
| 6969686 |
Memory device having isolation trenches with different depths and the method for making the same |
Nov. 29, 2005 |
| 6960531 |
Method of manufacturing electronic device |
Nov. 1, 2005 |
| 6958295 |
Method for using a hard mask for critical dimension growth containment |
Oct. 25, 2005 |
| 6951820 |
Method for using a hard mask for critical dimension growth containment |
Oct. 4, 2005 |
| 6946313 |
Method of making an aligned electrode on a semiconductor structure |
Sep. 20, 2005 |
| 6932916 |
Semiconductor substrate with trenches of varying depth |
Aug. 23, 2005 |
| 6929784 |
Chlorotrifuorine gas generator system |
Aug. 16, 2005 |
| 6930027 |
Method of manufacturing a semiconductor component |
Aug. 16, 2005 |
| 6927172 |
Process to suppress lithography at a wafer edge |
Aug. 9, 2005 |
| 6926871 |
Gas generation system |
Aug. 9, 2005 |
| 6919259 |
Method for STI etching using endpoint detection |
Jul. 19, 2005 |
| 6903023 |
In-situ plasma etch for TERA hard mask materials |
Jun. 7, 2005 |
| 6900133 |
Method of etching variable depth features in a crystalline substrate |
May. 31, 2005 |
| 6900134 |
Method for forming openings in a substrate using bottom antireflective coatings |
May. 31, 2005 |
| 6893938 |
STI formation for vertical and planar transistors |
May. 17, 2005 |
| 6890859 |
Methods of forming semiconductor structures having reduced defects, and articles and devices formed thereby |
May. 10, 2005 |
| 6887649 |
Multi-layered resist structure and manufacturing method of semiconductor device |
May. 3, 2005 |
| 6872632 |
Method of fabricating semiconductor device |
Mar. 29, 2005 |
| 6867143 |
Method for etching a semiconductor substrate using germanium hard mask |
Mar. 15, 2005 |
| 6864184 |
Method for reducing critical dimension attainable via the use of an organic conforming layer |
Mar. 8, 2005 |
| 6864144 |
Method of stabilizing resist material through ion implantation |
Mar. 8, 2005 |
| 6861367 |
Semiconductor processing method using photoresist and an antireflective coating |
Mar. 1, 2005 |
| 6861104 |
Method of enhancing adhesion strength of BSG film to silicon nitride film |
Mar. 1, 2005 |
| 6852640 |
Method for fabricating a hard mask |
Feb. 8, 2005 |
| 6841341 |
Method of depositing an amorphous carbon layer |
Jan. 11, 2005 |
| 6838386 |
Method for precision-processing a fine structure |
Jan. 4, 2005 |
| 6835670 |
Method of manufacturing semiconductor device |
Dec. 28, 2004 |
| 6828212 |
Method of forming shallow trench isolation structure in a semiconductor device |
Dec. 7, 2004 |
| 6828248 |
Method of pull back for forming shallow trench isolation |
Dec. 7, 2004 |
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