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Class Information
Number: 257/E21.231
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Processes or apparatus adapted for manufacture or treatment of semiconductor or solid-state devices or of parts thereof (epo) > Manufacture or treatment of semiconductor device (epo) > Device having at least one potential-jump barrier or surface barrier, e.g., pn junction, depletion layer, carrier concentration layer (epo) > Device having semiconductor body comprising group iv elements or group iii-v compounds with or without impurities, e.g., doping materials (epo) > Treatment of semiconductor body using process other than deposition of semiconductor material on a substrate, diffusion or alloying of impurity material, or radiation treatment (epo) > To change their surface-physical characteristics or shape, e.g., etching, polishing, cutting (epo) > Chemical or electrical treatment, e.g., electrolytic etching (epo) > Using mask (epo)
Description: This subclass is indented under subclass E21.215. This subclass is substantially the same in scope as ECLA classification H01L21/308.
Sub-classes under this class:
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7452820 |
Radiation-resistant zone plates and method of manufacturing thereof |
Nov. 18, 2008 |
| 7445943 |
Magnetic tunnel junction memory and method with etch-stop layer |
Nov. 4, 2008 |
| 7442640 |
Semiconductor device manufacturing methods |
Oct. 28, 2008 |
| 7419906 |
Method for manufacturing a through conductor |
Sep. 2, 2008 |
| 7416987 |
Semiconductor device and method of fabricating the same |
Aug. 26, 2008 |
| 7410854 |
Method of making FUSI gate and resulting structure |
Aug. 12, 2008 |
| 7410891 |
Method of manufacturing a superjunction device |
Aug. 12, 2008 |
| 7405144 |
Method for manufacturing probe card |
Jul. 29, 2008 |
| 7384833 |
Stress liner for integrated circuits |
Jun. 10, 2008 |
| 7384874 |
Method of forming hardmask pattern of semiconductor device |
Jun. 10, 2008 |
| 7368359 |
Method for manufacturing semiconductor substrate and semiconductor substrate |
May. 6, 2008 |
| 7329606 |
Semiconductor device having nanowire contact structures and method for its fabrication |
Feb. 12, 2008 |
| 7285497 |
Mask, method for manufacturing a mask, method for manufacturing an electro-optical device, and electronic equipment |
Oct. 23, 2007 |
| 7271094 |
Multiple shadow mask structure for deposition shadow mask protection and method of making and using same |
Sep. 18, 2007 |
| 7241634 |
Semiconductor device and method for producing the same |
Jul. 10, 2007 |
| 7226872 |
Lightly doped drain MOS transistor |
Jun. 5, 2007 |
| 7109110 |
Method of manufacturing a superjunction device |
Sep. 19, 2006 |
| 7026210 |
Method for forming a bottle-shaped trench |
Apr. 11, 2006 |
| 6844023 |
Alumina insulation for coating implantable components and other microminiature devices |
Jan. 18, 2005 |
| 6818528 |
Method for multi-depth trench isolation |
Nov. 16, 2004 |
| 6780337 |
Method for trench etching |
Aug. 24, 2004 |
| 6750153 |
Process for producing macroscopic cavities beneath the surface of a silicon wafer |
Jun. 15, 2004 |
| 6686292 |
Plasma etch method for forming uniform linewidth residue free patterned composite silicon containing dielectric layer/silicon stack layer |
Feb. 3, 2004 |
| 6660643 |
Etching of semiconductor wafer edges |
Dec. 9, 2003 |
| 6649996 |
In situ and ex situ hardmask process for STI with oxide collar application |
Nov. 18, 2003 |
| 6577010 |
Stepped photoresist profile and opening formed using the profile |
Jun. 10, 2003 |
| 6566273 |
Etch selectivity inversion for etching along crystallographic directions in silicon |
May. 20, 2003 |
| 6440862 |
Stepped photoresist profile and opening formed using the profile |
Aug. 27, 2002 |
| 6426175 |
Fabrication of a high density long channel DRAM gate with or without a grooved gate |
Jul. 30, 2002 |
| 6398430 |
Semiconductor device fabrication system |
Jun. 4, 2002 |
| 6362113 |
Method of forming pattern |
Mar. 26, 2002 |
| 6331489 |
Semiconductor device production method |
Dec. 18, 2001 |
| 6274198 |
Shadow mask deposition |
Aug. 14, 2001 |
| 6225234 |
In situ and ex situ hardmask process for STI with oxide collar application |
May. 1, 2001 |
| 6214686 |
Spatially offset deep trenches for high density DRAMS |
Apr. 10, 2001 |
| 6200906 |
Stepped photoresist profile and opening formed using the profile |
Mar. 13, 2001 |
| 6198150 |
Integrated circuit with deep trench having multiple slopes |
Mar. 6, 2001 |
| 6162702 |
Self-supported ultra thin silicon wafer process |
Dec. 19, 2000 |
| 6127623 |
Solar cell and production process therefor |
Oct. 3, 2000 |
| 6093511 |
Method of manufacturing semiconductor device |
Jul. 25, 2000 |
| 6069091 |
In-situ sequential silicon containing hard mask layer/silicon layer plasma etch method |
May. 30, 2000 |
| 5965005 |
Mask for porous silicon formation |
Oct. 12, 1999 |
| 5914280 |
Deep trench etch on bonded silicon wafer |
Jun. 22, 1999 |
| 5907771 |
Reduction of pad erosion |
May. 25, 1999 |
| 5776817 |
Method of forming a trench structure in a semiconductor device |
Jul. 7, 1998 |
| 5738757 |
Planar masking for multi-depth silicon etching |
Apr. 14, 1998 |
| 5695658 |
Non-photolithographic etch mask for submicron features |
Dec. 9, 1997 |
| 5693182 |
Method for damage etching the back side of a semiconductor disk having a protected front side |
Dec. 2, 1997 |
| 5610090 |
Method of making a FET having a recessed gate structure |
Mar. 11, 1997 |
| 5554256 |
Method of manufacturing a semiconductor device having a semiconductor body with field insulation regions formed by grooves filled with insulating material |
Sep. 10, 1996 |
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