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Class Information
Number: 257/E21.206
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Processes or apparatus adapted for manufacture or treatment of semiconductor or solid-state devices or of parts thereof (epo) > Manufacture or treatment of semiconductor device (epo) > Device having at least one potential-jump barrier or surface barrier, e.g., pn junction, depletion layer, carrier concentration layer (epo) > Device having semiconductor body comprising group iv elements or group iii-v compounds with or without impurities, e.g., doping materials (epo) > Manufacture of electrode on semiconductor body using process other than by epitaxial growth, diffusion of impurities, alloying of impurity materials, or radiation bombardment (epo) > Making electrode structure comprising conductor-insulator-semiconductor, e.g., mis gate (epo) > Insulator formed on silicon semiconductor body (epo) > Characterized by conductor (epo) > Lithography, isolation, or planarization-related aspects of making conductor-insulator-semiconductor structure, e.g., sub-lithography lengths; to solve problems arising at crossing with side of device isolation (epo)
Description: This subclass is indented under subclass E21.195. This subclass is substantially the same in scope as ECLA classification H01L21/28E2B30.










Patents under this class:
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Patent Number Title Of Patent Date Issued
8703575 Method of forming isolation area and structure thereof Apr. 22, 2014
8680671 Self-aligned double patterning for memory and other microelectronic devices Mar. 25, 2014
8598042 Device manufacturing and cleaning method Dec. 3, 2013
8574926 Magnetic memory and manufacturing method thereof Nov. 5, 2013
8501608 Method for processing semiconductor device Aug. 6, 2013
8450169 Replacement metal gate structures providing independent control on work function and gate leakage current May. 28, 2013
8394714 Anti-reflective coatings for micro-fluid applications Mar. 12, 2013
8324119 Enhancing deposition uniformity of a channel semiconductor alloy by an in situ etch process Dec. 4, 2012
8173548 Reverse planarization method May. 8, 2012
8120139 Void isolated III-nitride device Feb. 21, 2012
8114727 Disposable spacer integration with stress memorization technique and silicon-germanium Feb. 14, 2012
8072023 Isolation for non-volatile memory cell array Dec. 6, 2011
8043948 Semiconductor device manufacturing method and design support apparatus Oct. 25, 2011
7972875 Optical systems fabricated by printing-based assembly Jul. 5, 2011
7968421 Method for manufacturing SOI structure in desired region of a semiconductor device Jun. 28, 2011
7910443 Method involving trimming a hard mask in the peripheral region of a semiconductor device Mar. 22, 2011
7875987 Method and apparatus for measurement and control of photomask to substrate alignment Jan. 25, 2011
7855410 Semiconductor memory devices having a floating gate with a projecting portion and methods of forming semiconductor memory devices having a floating gate with a projecting portion Dec. 21, 2010
7855116 Nonvolatile semiconductor memory device and manufacturing method thereof Dec. 21, 2010
7851316 Fabrication method of semiconductor device Dec. 14, 2010
7838416 Method of fabricating phase change memory cell Nov. 23, 2010
7790619 Method for fabricating semiconductor device having narrow channel Sep. 7, 2010
7790542 CMOS devices having reduced threshold voltage variations and methods of manufacture thereof Sep. 7, 2010
7786527 Sub-lithographic gate length transistor using self-assembling polymers Aug. 31, 2010
7772637 Semiconductor devices including gate structures and leakage barrier oxides Aug. 10, 2010
7749846 Method of forming contact structure and method of fabricating semiconductor device using the same Jul. 6, 2010
7723178 Shallow and deep trench isolation structures in semiconductor integrated circuits May. 25, 2010
7659173 Method for manufacturing insulated-gate type field effect transistor Feb. 9, 2010
7615837 Lithography device for semiconductor circuit pattern generation Nov. 10, 2009
7601586 Methods of forming buried bit line DRAM circuitry Oct. 13, 2009
7563709 Pattern formation method and method for forming semiconductor device Jul. 21, 2009
7547621 LPCVD gate hard mask Jun. 16, 2009
7541286 Method for manufacturing semiconductor device using KrF light source Jun. 2, 2009
7494922 Small electrode for phase change memories Feb. 24, 2009
7482228 Method of forming a MOS transistor with a litho-less gate Jan. 27, 2009
7439602 Semiconductor device and its manufacturing method Oct. 21, 2008
7425489 Self-aligned shallow trench isolation Sep. 16, 2008
7425496 Method for delineating a conducting element disposed on an insulating layer, device and transistor thus obtained Sep. 16, 2008
7399649 Semiconductor light-emitting device and fabrication method thereof Jul. 15, 2008
7394120 Semiconductor device having a shaped gate electrode and method of manufacturing the same Jul. 1, 2008
7393789 Protective coating for planarization Jul. 1, 2008
7386182 Optimization of multiple feature lithography Jun. 10, 2008
7355239 Fabrication of semiconductor device exhibiting reduced dielectric loss in isolation trenches Apr. 8, 2008
7332405 Method of forming alignment marks for semiconductor device fabrication Feb. 19, 2008
7316958 Masks for fabricating semiconductor devices and methods of forming mask patterns Jan. 8, 2008
7296245 Combined e-beam and optical exposure semiconductor lithography Nov. 13, 2007
7291554 Method for forming semiconductor device Nov. 6, 2007
7265013 Sidewall image transfer (SIT) technologies Sep. 4, 2007
7253105 Reliable BEOL integration process with direct CMP of porous SiCOH dielectric Aug. 7, 2007
7247571 Method for planarizing semiconductor structures Jul. 24, 2007

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