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Class Information
Number: 257/E21.205
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Processes or apparatus adapted for manufacture or treatment of semiconductor or solid-state devices or of parts thereof (epo) > Manufacture or treatment of semiconductor device (epo) > Device having at least one potential-jump barrier or surface barrier, e.g., pn junction, depletion layer, carrier concentration layer (epo) > Device having semiconductor body comprising group iv elements or group iii-v compounds with or without impurities, e.g., doping materials (epo) > Manufacture of electrode on semiconductor body using process other than by epitaxial growth, diffusion of impurities, alloying of impurity materials, or radiation bombardment (epo) > Making electrode structure comprising conductor-insulator-semiconductor, e.g., mis gate (epo) > Insulator formed on silicon semiconductor body (epo) > Characterized by conductor (epo) > Characterized by sectional shape, e.g., t-shape, inverted t, spacer (epo)
Description: This subclass is indented under subclass E21.195. This subclass is substantially the same in scope as ECLA classification H01L21/28E2B20.










Patents under this class:
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Patent Number Title Of Patent Date Issued
6353249 MOSFET with high dielectric constant gate insulator and minimum overlap capacitance Mar. 5, 2002
6346450 Process for manufacturing MIS transistor with self-aligned metal grid Feb. 12, 2002
6344388 Method of manufacturing semiconductor device Feb. 5, 2002
6344397 Semiconductor device having a gate electrode with enhanced electrical characteristics Feb. 5, 2002
6342414 Damascene NiSi metal gate high-k transistor Jan. 29, 2002
6337262 Self aligned T-top gate process integration Jan. 8, 2002
6333229 Method for manufacturing a field effect transitor (FET) having mis-aligned-gate structure Dec. 25, 2001
6331478 Methods for manufacturing semiconductor devices having chamfered metal silicide layers Dec. 18, 2001
6326273 Method of fabricating a field effect transistor with trapezoidal shaped gate dielectric and/or gate electrode Dec. 4, 2001
6326291 Fabrication of a wide metal silicide on a narrow polysilicon gate structure Dec. 4, 2001
6326290 Low resistance self aligned extended gate structure utilizing A T or Y shaped gate structure for high performance deep submicron FET Dec. 4, 2001
6323525 MISFET semiconductor device having relative impurity concentration levels between layers Nov. 27, 2001
6319802 T-gate formation using modified damascene processing with two masks Nov. 20, 2001
6316323 Method for forming bridge free silicide by reverse spacer Nov. 13, 2001
6313019 Y-gate formation using damascene processing Nov. 6, 2001
6309933 Method of fabricating T-shaped recessed polysilicon gate transistors Oct. 30, 2001
6306715 Method to form smaller channel with CMOS device by isotropic etching of the gate materials Oct. 23, 2001
6306710 Fabrication of a gate structures having a longer length toward the top for formation of a rectangular shaped spacer Oct. 23, 2001
6303447 Method for forming an extended metal gate using a damascene process Oct. 16, 2001
6297106 Transistors with low overlap capacitance Oct. 2, 2001
6291301 Fabrication method of a gate junction conductive structure Sep. 18, 2001
6291864 Gate structure having polysilicon layer with recessed side portions Sep. 18, 2001
6287922 Method for fabricating graded LDD transistor using controlled polysilicon gate profile Sep. 11, 2001
6287923 Method of forming a MOS transistor Sep. 11, 2001
6277704 Microelectronic device fabricating method, method of forming a pair of conductive device components of different base widths from a common deposited conductive layer Aug. 21, 2001
6277699 Method for forming a metal-oxide-semiconductor transistor Aug. 21, 2001
6271128 Method for fabricating transistor Aug. 7, 2001
6271094 Method of making MOSFET with high dielectric constant gate insulator and minimum overlap capacitance Aug. 7, 2001
6261910 Semiconductor device and method of manufacturing the same Jul. 17, 2001
6259144 Electronic memory structure Jul. 10, 2001
6255202 Damascene T-gate using a spacer flow Jul. 3, 2001
6251737 Method of increasing gate surface area for depositing silicide material Jun. 26, 2001
6245685 Method for forming a square oxide structure or a square floating gate structure without rounding effect Jun. 12, 2001
6246091 Lateral MOSFET having a barrier between the source/drain regions and the channel Jun. 12, 2001
6239007 Method of forming T-shaped gate May. 29, 2001
6235564 Method of manufacturing MISFET May. 22, 2001
6232209 Semiconductor device and manufacturing method thereof May. 15, 2001
6225201 Ultra short transistor channel length dictated by the width of a sidewall spacer May. 1, 2001
6221708 Field effect transistor assemblies, integrated circuitry, and methods of forming field effect transistors and integrated circuitry Apr. 24, 2001
6207490 Semiconductor device and method for fabricating the same Mar. 27, 2001
6194768 High dielectric constant gate dielectric with an overlying tantalum gate conductor formed on a sidewall surface of a sacrificial structure Feb. 27, 2001
6187641 Lateral MOSFET having a barrier between the source/drain region and the channel region using a heterostructure raised source/drain region Feb. 13, 2001
6180978 Disposable gate/replacement gate MOSFETs for sub-0.1 micron gate length and ultra-shallow junctions Jan. 30, 2001
6171912 Method of manufacturing a semiconductor device comprising a field effect transistor Jan. 9, 2001
6171937 Process for producing an MOS transistor Jan. 9, 2001
6169017 Method to increase contact area Jan. 2, 2001
6165882 Polysilicon gate having a metal plug, for reduced gate resistance, within a trench extending into the polysilicon layer of the gate Dec. 26, 2000
6159781 Way to fabricate the self-aligned T-shape gate to reduce gate resistivity Dec. 12, 2000
6160301 Gate structure Dec. 12, 2000
6159780 Method of fabricating semiconductor device on SOI substrate Dec. 12, 2000

1 2 3 4 5 6 7 8 9










 
 
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