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Class Information
Number: 257/E21.198
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Processes or apparatus adapted for manufacture or treatment of semiconductor or solid-state devices or of parts thereof (epo) > Manufacture or treatment of semiconductor device (epo) > Device having at least one potential-jump barrier or surface barrier, e.g., pn junction, depletion layer, carrier concentration layer (epo) > Device having semiconductor body comprising group iv elements or group iii-v compounds with or without impurities, e.g., doping materials (epo) > Manufacture of electrode on semiconductor body using process other than by epitaxial growth, diffusion of impurities, alloying of impurity materials, or radiation bombardment (epo) > Making electrode structure comprising conductor-insulator-semiconductor, e.g., mis gate (epo) > Insulator formed on silicon semiconductor body (epo) > Characterized by conductor (epo) > Final conductor layer next to insulator being silicon e.g., polysilicon, with or without impurities (epo) > Conductor comprising at least another nonsilicon conductive layer (epo)
Description: This subclass is indented under subclass E21.197. This subclass is substantially the same in scope as ECLA classification H01L21/28E2B2P.










Sub-classes under this class:

Class Number Class Name Patents
257/E21.199 Conductor comprising silicide layer formed by silicidation reaction of silicon with metal layer (epo) 507
257/E21.2 Conductor comprising metal or metallic silicide formed by deposition e.g., sputter deposition, i.e., without silicidation reaction (epo) 513


Patents under this class:
1 2

Patent Number Title Of Patent Date Issued
8536040 Techniques for using material substitution processes to form replacement metal gate electrodes of semiconductor devices with self-aligned contacts Sep. 17, 2013
8124515 Gate etch optimization through silicon dopant profile change Feb. 28, 2012
7915128 High voltage semiconductor devices Mar. 29, 2011
7811891 Method to control the gate sidewall profile by graded material composition Oct. 12, 2010
7632744 Semiconductor integrated circuit device and process for manufacturing the same Dec. 15, 2009
7611973 Methods of selectively forming epitaxial semiconductor layer on single crystalline semiconductor and semiconductor devices fabricated using the same Nov. 3, 2009
7566655 Integration process for fabricating stressed transistor structure Jul. 28, 2009
7541269 Method of forming tungsten polymetal gate having low resistance Jun. 2, 2009
7538030 Semiconductor device and method of manufacturing same May. 26, 2009
7479446 Semiconductor device and method of manufacturing same Jan. 20, 2009
7446026 Method of forming a CMOS device with stressor source/drain regions Nov. 4, 2008
7375017 Method for fabricating semiconductor device having stacked-gate structure May. 20, 2008
7371681 Method of manufacturing a semiconductor device May. 13, 2008
7229919 Semiconductor device having a random grained polysilicon layer and a method for its manufacture Jun. 12, 2007
7129564 Structure and method of forming a notched gate field effect transistor Oct. 31, 2006
7053459 Semiconductor integrated circuit device and process for producing the same May. 30, 2006
7015151 Transistor fabrication methods comprising selective wet oxidation Mar. 21, 2006
6992010 Gate structure and method of manufacture Jan. 31, 2006
6982433 Gate-induced strain for MOS performance improvement Jan. 3, 2006
6975007 Semiconductor device including a polysilicon, barrier structure, and tungsten layer electrode Dec. 13, 2005
6960808 Semiconductor device having a lower parasitic capacitance Nov. 1, 2005
6927154 Method for fabricating a transistor with a gate structure Aug. 9, 2005
6911384 Gate structure with independently tailored vertical doping profile Jun. 28, 2005
6905976 Structure and method of forming a notched gate field effect transistor Jun. 14, 2005
6905980 Semiconductor device and method of manufacturing same Jun. 14, 2005
6884473 Method for fabricating metal silicide Apr. 26, 2005
6872644 Semiconductor device with non-compounded contacts, and method of making Mar. 29, 2005
6841461 Method for forming gate electrode of semiconductor device Jan. 11, 2005
6838695 CMOS device structure with improved PFET gate electrode Jan. 4, 2005
6835672 Selective oxidation for semiconductor device fabrication Dec. 28, 2004
6835610 Method of manufacturing semiconductor device having gate electrode with expanded upper portion Dec. 28, 2004
6818554 Method for fabricating a semiconductor device having a metallic silicide layer Nov. 16, 2004
6797559 Method of fabricating semiconductor device having metal conducting layer Sep. 28, 2004
6784491 MOS devices with reduced fringing capacitance Aug. 31, 2004
6780741 Method of forming a novel gate electrode structure comprised of a silicon-germanium layer located between random grained polysilicon layers Aug. 24, 2004
6762454 Stacked polysilicon layer for boron penetration inhibition Jul. 13, 2004
6709960 Laser anneal process for reduction of polysilicon depletion Mar. 23, 2004
6693313 Field effect transistors, field effect transistor assemblies, and integrated circuitry Feb. 17, 2004
6686637 Gate structure with independently tailored vertical doping profile Feb. 3, 2004
6645821 Method of producing a thin film resistor in an integrated circuit Nov. 11, 2003
6627558 Apparatus and method for selectively restricting process fluid flow in semiconductor processing Sep. 30, 2003
6615391 Current controlled multi-state parallel test for semiconductor device Sep. 2, 2003
6607979 Semiconductor device and method of producing the same Aug. 19, 2003
6579784 Method for forming a metal gate integrated with a source and drain salicide process with oxynitride spacers Jun. 17, 2003
6566209 Method to form shallow junction transistors while eliminating shorts due to junction spiking May. 20, 2003
6566211 Surface modified interconnects May. 20, 2003
6545356 Graded layer for use in semiconductor circuits and method for making same Apr. 8, 2003
6541322 Method for preventing gate depletion effects of MOS transistor Apr. 1, 2003
6531750 Shallow junction transistors which eliminating shorts due to junction spiking Mar. 11, 2003
6504210 Fully encapsulated damascene gates for Gigabit DRAMs Jan. 7, 2003

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