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Class Information
Number: 257/E21.182
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Processes or apparatus adapted for manufacture or treatment of semiconductor or solid-state devices or of parts thereof (epo) > Manufacture or treatment of semiconductor device (epo) > Device having at least one potential-jump barrier or surface barrier, e.g., pn junction, depletion layer, carrier concentration layer (epo) > Device having semiconductor body comprising group iv elements or group iii-v compounds with or without impurities, e.g., doping materials (epo) > Manufacture of electrode on semiconductor body using process other than by epitaxial growth, diffusion of impurities, alloying of impurity materials, or radiation bombardment (epo) > Manufacture or post-treatment of electrode having a capacitive structure, i.e., gate structure for field-effect device (epo) > Mos-gate structure (epo) > On semiconductor body comprising group iv element excluding non-elemental si, e.g., ge, c, diamond, silicon compound or compound, such as sic or sige (epo)
Description: This subclass is indented under subclass E21.177. This subclass is substantially the same in scope as ECLA classification H01L21/28B2G.

Patents under this class:
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Patent Number Title Of Patent Date Issued
8637925 Nickel-silicide formation with differential Pt composition Jan. 28, 2014
8624324 Connecting through vias to devices Jan. 7, 2014
8603887 Method for depositing a silicon oxide layer of same thickness on silicon and on silicon-germanium Dec. 10, 2013
8604529 Apparatus with photodiode region in multiple epitaxial layers Dec. 10, 2013
8564018 Relaxed silicon germanium substrate with low defect density Oct. 22, 2013
8390074 Structure and method for latchup improvement using through wafer via latchup guard ring Mar. 5, 2013
8377812 SiC MOSFETs and self-aligned fabrication methods thereof Feb. 19, 2013
8344455 Semiconductor device and fabrication method for the same Jan. 1, 2013
8288757 Semiconductor device and manufacturing method thereof Oct. 16, 2012
8278686 Structure and method for forming planar gate field effect transistor with low resistance channel region Oct. 2, 2012
8198194 Methods of forming p-channel field effect transistors having SiGe source/drain regions Jun. 12, 2012
8168505 Method of fabricating transistor with epitaxial layers having different germanium concentrations May. 1, 2012
8154051 MOS transistor with in-channel and laterally positioned stressors Apr. 10, 2012
8125037 Field effect transistor with channel region edge and center portions having different band structures for suppressed corner leakage Feb. 28, 2012
8114739 Semiconductor device with oxygen-diffusion barrier layer and method for fabricating same Feb. 14, 2012
8093143 Method for producing a wafer comprising a silicon single crystal substrate having a front and a back side and a layer of SiGe deposited on the front side Jan. 10, 2012
8084346 Replacement metal gate method Dec. 27, 2011
8043980 Methods for making and using halosilylgermanes Oct. 25, 2011
8021982 Method of silicide formation by adding graded amount of impurity during metal deposition Sep. 20, 2011
8017504 Transistor having a high-k metal gate stack and a compressively stressed channel Sep. 13, 2011
7989282 Structure and method for latchup improvement using through wafer via latchup guard ring Aug. 2, 2011
7985690 Method for a gate last process Jul. 26, 2011
7977226 Flash memory device and method of fabricating the same Jul. 12, 2011
7972971 Method for producing Si.sub.1-yGe.sub.y based zones with different contents in Ge on a same substrate by condensation of germanium Jul. 5, 2011
7960256 Use of CL2 and/or HCL during silicon epitaxial film formation Jun. 14, 2011
7951695 Method for reducing plasma discharge damage during processing May. 31, 2011
7944023 Strained Si formed by anneal May. 17, 2011
7943969 Transistor with a plurality of layers with different Ge concentrations May. 17, 2011
7939367 Method for growing an adherent diamond layer atop an interlayer bonded to a compound semiconductor substrate May. 10, 2011
7902008 Methods for fabricating a stressed MOS device Mar. 8, 2011
7892905 Formation of strained Si channel and Si.sub.1-xGe.sub.x source/drain structures using laser annealing Feb. 22, 2011
7855127 Method for manufacturing semiconductor substrate Dec. 21, 2010
7833887 Notched-base spacer profile for non-planar transistors Nov. 16, 2010
7834362 SiC crystal semiconductor device Nov. 16, 2010
7825458 Nonvolatile semiconductor memory and manufacturing method thereof Nov. 2, 2010
7821033 Semiconductor component comprising a drift zone and a drift control zone Oct. 26, 2010
7816221 Dielectric ledge for high frequency devices Oct. 19, 2010
7816766 Semiconductor device with compressive and tensile stresses Oct. 19, 2010
7808081 Strained-silicon CMOS device and method Oct. 5, 2010
7799600 Doped diamond LED devices and associated methods Sep. 21, 2010
7781256 Semiconductor-on-diamond devices and associated methods Aug. 24, 2010
7700424 Method of forming an embedded silicon carbon epitaxial layer Apr. 20, 2010
7687338 Method of reducing embedded SiGe loss in semiconductor device manufacturing Mar. 30, 2010
7682991 Method of manufacturing silicon carbide semiconductor device Mar. 23, 2010
7683362 Semiconductor device and production method thereof Mar. 23, 2010
7649233 High performance transistor with a highly stressed channel Jan. 19, 2010
7619283 Methods of fabricating glass-based substrates and apparatus employing same Nov. 17, 2009
7608526 Strained layers within semiconductor buffer structures Oct. 27, 2009
7598145 Method for producing Si.sub.1-yGe.sub.y based zones with different contents in Ge on a same substrate by condensation of germanium Oct. 6, 2009
7588980 Methods of controlling morphology during epitaxial layer formation Sep. 15, 2009

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