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Class Information
Number: 257/E21.162
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Processes or apparatus adapted for manufacture or treatment of semiconductor or solid-state devices or of parts thereof (epo) > Manufacture or treatment of semiconductor device (epo) > Device having at least one potential-jump barrier or surface barrier, e.g., pn junction, depletion layer, carrier concentration layer (epo) > Device having semiconductor body comprising group iv elements or group iii-v compounds with or without impurities, e.g., doping materials (epo) > Manufacture of electrode on semiconductor body using process other than by epitaxial growth, diffusion of impurities, alloying of impurity materials, or radiation bombardment (epo) > Deposition of conductive or insulating material for electrode conducting electric current (epo) > From a gas or vapor, e.g., condensation (epo) > Of conductive layer (epo) > On semiconductor body comprising group iv element (epo)
Description: This subclass is indented under subclass E21.161. This subclass is substantially the same in scope as ECLA classification H01L21/285B4.










Sub-classes under this class:

Class Number Class Name Patents
257/E21.17 By chemical means, e.g., cvd, lpcvd, pecvd, laser cvd (epo) 977
257/E21.169 By physical means, e.g., sputtering, evaporation (epo) 361
257/E21.166 Conductive layer comprising semiconducting material (epo) 664
257/E21.165 Conductive layer comprising silicide (epo) 1,260
257/E21.168 Conductive layer comprising transition metal, e.g., ti, w, mo (epo) 470
257/E21.163 Deposition of schottky electrode (epo) 107
257/E21.164 O layer comprising silicide (epo) 10


Patents under this class:
1 2 3 4 5 6 7

Patent Number Title Of Patent Date Issued
7999266 Semiconductor device including poly-Si and method of manufacturing the same Aug. 16, 2011
7999250 Silicon-germanium-carbon semiconductor structure Aug. 16, 2011
7968915 Dual stress memorization technique for CMOS application Jun. 28, 2011
7955975 Semiconductor element and display device using the same Jun. 7, 2011
7943519 Etchant, method for fabricating interconnection line using the etchant, and method for fabricating thin film transistor substrate using the etchant May. 17, 2011
7932163 Methods of forming stacked semiconductor devices with single-crystal semiconductor regions Apr. 26, 2011
7642187 Method of forming wiring of a semiconductor memory device Jan. 5, 2010
7517765 Method for forming germanides and devices obtained thereof Apr. 14, 2009
7153735 Method of manufacturing semiconductor device Dec. 26, 2006
7064033 Semiconductor device and method of manufacturing same Jun. 20, 2006
6979633 Method of manufacturing semiconductor device Dec. 27, 2005
6964896 Methods of forming semiconductor logic circuitry, and semiconductor logic circuit constructions Nov. 15, 2005
6953741 Methods of fabricating contacts for semiconductor devices utilizing a pre-flow process Oct. 11, 2005
6949434 Method of manufacturing a vertical semiconductor device Sep. 27, 2005
6949467 Forming method of contact in semiconductor device and manufacturing method of PMOS device using the same Sep. 27, 2005
6943071 Integrated memory cell and method of fabrication Sep. 13, 2005
6933021 Method of TiSiN deposition using a chemical vapor deposition (CVD) process Aug. 23, 2005
6927431 Semiconductor circuit constructions Aug. 9, 2005
6911367 Methods of forming semiconductive materials having flattened surfaces; methods of forming isolation regions; and methods of forming elevated source/drain regions Jun. 28, 2005
6903417 Power semiconductor device Jun. 7, 2005
6894334 Semiconductor integrated circuit device, process for fabricating the same, and apparatus for fabricating the same May. 17, 2005
6891244 Plug structure having low contact resistance and method of manufacturing May. 10, 2005
6887753 Methods of forming semiconductor circuitry, and semiconductor circuit constructions May. 3, 2005
6887342 Field-assisted fusion bonding May. 3, 2005
6882052 Plasma enhanced liner Apr. 19, 2005
6858534 Method of manufacturing a multilayered doped conductor for a contact in an integrated device Feb. 22, 2005
6852634 Low cost method of providing a semiconductor device having a high channel density Feb. 8, 2005
6800898 Integrated circuit configuration and method of fabricating a dram structure with buried bit lines or trench capacitors Oct. 5, 2004
6784114 Monatomic layer passivation of semiconductor surfaces Aug. 31, 2004
6777758 Semiconductor device Aug. 17, 2004
6707111 Hydrogen implant for buffer zone of punch-through non EPI IGBT Mar. 16, 2004
6699530 Method for constructing a film on a semiconductor wafer Mar. 2, 2004
6693335 Semiconductor raised source-drain structure Feb. 17, 2004
6686636 Semiconductor raised source-drain structure Feb. 3, 2004
6683355 Semiconductor raised source-drain structure Jan. 27, 2004
6670682 Multilayered doped conductor Dec. 30, 2003
6667523 Highly linear integrated resistive contact Dec. 23, 2003
6660604 Method of forming double junction region and method of forming transfer transistor using the same Dec. 9, 2003
6653222 Plasma enhanced liner Nov. 25, 2003
6649539 Semiconductor contact fabrication method Nov. 18, 2003
6649478 Semiconductor device and method of manufacturing same Nov. 18, 2003
6645831 Thermally stable crystalline defect-free germanium bonded to silicon and silicon dioxide Nov. 11, 2003
6646320 Method of forming contact to poly-filled trench isolation region Nov. 11, 2003
6620665 Method for fabricating semiconductor device Sep. 16, 2003
6617242 Method for fabricating interlevel contacts of aluminum/refractory metal alloys Sep. 9, 2003
6610582 Field-assisted fusion bonding Aug. 26, 2003
6597045 Semiconductor raised source-drain structure Jul. 22, 2003
6596606 Semiconductor raised source-drain structure Jul. 22, 2003
6593214 Method of manufacturing semiconductor device Jul. 15, 2003
6583055 Method of forming stepped contact trench for semiconductor devices Jun. 24, 2003

1 2 3 4 5 6 7










 
 
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