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Class Information
Number: 257/E21.156
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Processes or apparatus adapted for manufacture or treatment of semiconductor or solid-state devices or of parts thereof (epo) > Manufacture or treatment of semiconductor device (epo) > Device having at least one potential-jump barrier or surface barrier, e.g., pn junction, depletion layer, carrier concentration layer (epo) > Device having semiconductor body comprising group iv elements or group iii-v compounds with or without impurities, e.g., doping materials (epo) > Alloying of impurity material, e.g., doping material, electrode material, with a semiconductor body (epo) > Alloying of electrode material (epo)
Description: This subclass is indented under subclass E21.154. This subclass is substantially the same in scope as ECLA classification H01L21/24C.










Sub-classes under this class:

Class Number Class Name Patents
257/E21.157 With group iii-v compound (epo) 11


Patents under this class:

Patent Number Title Of Patent Date Issued
8647959 Metal-insulator-metal capacitor alloying process Feb. 11, 2014
8617974 Method of manufacturing semiconductor device and semiconductor device Dec. 31, 2013
8501604 Method for forming a doped region in a semiconductor layer of a substrate and use of such method Aug. 6, 2013
8455370 Transfer of high temperature wafers Jun. 4, 2013
8158483 Semiconductor device and its manufacturing method Apr. 17, 2012
8153536 Transfer of high temperature wafers Apr. 10, 2012
8119492 Dissolving precipates in alloy material in capacitor structure Feb. 21, 2012
8076239 Semiconductor device and method of manufacturing the same Dec. 13, 2011
8003432 Consumable adhesive layer for thin film photovoltaic material Aug. 23, 2011
7888148 Signal line for a display device, etchant, thin film transistor panel, and method for manufacturing the same Feb. 15, 2011
7816244 Insulating buffer film and high dielectric constant semiconductor device and method for fabricating the same Oct. 19, 2010
7800105 Ga.sub.2O.sub.3 semiconductor device Sep. 21, 2010
7795100 Semiconductor device and its manufacturing method Sep. 14, 2010
7659154 Dual gate CMOS fabrication Feb. 9, 2010
7605077 Dual metal integration scheme based on full silicidation of the gate electrode Oct. 20, 2009
5223453 Controlled metal-semiconductor sintering/alloying by one-directional reverse illumination Jun. 29, 1993
4534100 Electrical method of making conductive paths in silicon Aug. 13, 1985
4517226 Metallization process of a wafer back May. 14, 1985
4454528 Low resistance backside preparation for semiconductor integrated circuit chips Jun. 12, 1984
4297391 Method of applying electrical contacts to a photovoltaic cell Oct. 27, 1981
4293587 Low resistance backside preparation for semiconductor integrated circuit chips Oct. 6, 1981











 
 
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