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Class Information
Number: 257/E21.144
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Processes or apparatus adapted for manufacture or treatment of semiconductor or solid-state devices or of parts thereof (epo) > Manufacture or treatment of semiconductor device (epo) > Device having at least one potential-jump barrier or surface barrier, e.g., pn junction, depletion layer, carrier concentration layer (epo) > Device having semiconductor body comprising group iv elements or group iii-v compounds with or without impurities, e.g., doping materials (epo) > Diffusion of impurity material, e.g., doping material, electrode material, into or out of a semiconductor body, or between semiconductor regions; interactions between two or more impurities; redistribution of impurities (epo) > Using diffusion into or out of a s olid from or into a solid phase, e.g., a doped oxide layer (epo)
Description: This subclass is indented under subclass E21.135. This subclass is substantially the same in scope as ECLA classification H01L21/225.


Sub-classes under this class:

Class Number Class Name Patents
257/E21.152 Diffusion into or out of group iii-v compound (epo) 56
257/E21.145 Diffusion into or out of group iv semiconductor (epo) 15


Patents under this class:

Patent Number Title Of Patent Date Issued
7326631 Method of manufacturing MOS transistors with gate electrodes formed in a packet of metal layers deposited upon one another Feb. 5, 2008
7303967 Method for fabricating transistor of semiconductor device Dec. 4, 2007
7282428 Method for solid phase diffusion of zinc into an InP-based photodiode and an InP photodiode made with the method Oct. 16, 2007
6916730 Method for forming a gate Jul. 12, 2005
6531379 High resolution dopant/impurity incorporation in semiconductors via a scanned atomic force probe Mar. 11, 2003
6251755 High resolution dopant/impurity incorporation in semiconductors via a scanned atomic force probe Jun. 26, 2001
4907059 Semiconductor bipolar-CMOS inverter Mar. 6, 1990
4757027 Method for fabricating improved oxide defined transistors Jul. 12, 1988
4720308 Method for producing high-aspect ratio hollow diffused regions in a semiconductor body and diode produced thereby Jan. 19, 1988
4712125 Structure for contacting a narrow width PN junction region Dec. 8, 1987
4692348 Low temperature shallow doping technique Sep. 8, 1987
4676847 Controlled boron doping of silicon Jun. 30, 1987
4626293 Method of making a high voltage DMOS transistor Dec. 2, 1986
4619719 Process for forming a doped oxide film and composite article Oct. 28, 1986
4605450 Process for forming a doped oxide film and doped semiconductor Aug. 12, 1986
4578283 Polymeric boron nitrogen dopant Mar. 25, 1986
4529456 Method of forming bifets by forming isolation regions connected by diffusion in semiconductor substrate and epitaxial layer Jul. 16, 1985
4485552 Complementary transistor structure and method for manufacture Dec. 4, 1984
4472212 Method for fabricating a semiconductor device Sep. 18, 1984
4471524 Method for manufacturing an insulated gate field effect transistor device Sep. 18, 1984
4435225 Method of forming self-aligned lateral bipolar transistor Mar. 6, 1984
4050966 Method for the preparation of diffused silicon semiconductor components Sep. 27, 1977



 
 
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