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Class Information
Number: 257/E21.122
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Processes or apparatus adapted for manufacture or treatment of semiconductor or solid-state devices or of parts thereof (epo) > Manufacture or treatment of semiconductor device (epo) > Device having at least one potential-jump barrier or surface barrier, e.g., pn junction, depletion layer, carrier concentration layer (epo) > Device having semiconductor body comprising group iv elements or group iii-v compounds with or without impurities, e.g., doping materials (epo) > Deposition of semiconductor material on substrate, e.g., epitaxial growth, solid phase epitaxy (epo) > Characterized by the substrate (epo) > Bonding of semiconductor wafer to insulating substrate or to semic onducting substrate using an intermediate insulating layer (epo)
Description: This subclass is indented under subclass E21.119. This subclass is substantially the same in scope as ECLA classification H01L21/20B2.


Sub-classes under this class:

Class Number Class Name Patents
257/E21.123 Substrate is crystalline semiconductor material, e.g., lattice adaptation, heteroepitaxy (epo) 142


Patents under this class:
1 2 3 4 5 6 7 8 9

Patent Number Title Of Patent Date Issued
7205210 Semiconductor structure having strained semiconductor and method therefor Apr. 17, 2007
7192842 Method for bonding wafers Mar. 20, 2007
7186628 Method of manufacturing an SOI wafer where COP's are eliminated within the base wafer Mar. 6, 2007
7183656 Bilayer aluminum last metal for interconnects and wirebond pads Feb. 27, 2007
7176107 Hybrid substrate and method for fabricating the same Feb. 13, 2007
7170098 Electronic assembly including a die having an integrated circuit and a layer of diamond to transfer heat Jan. 30, 2007
7160791 Batch process and device for forming spacer structures for packaging optical reflection devices Jan. 9, 2007
7151052 Multiple etch-stop layer deposition scheme and materials Dec. 19, 2006
7148121 Semiconductor on insulator device architecture and method of construction Dec. 12, 2006
7145212 Method for manufacturing device substrate with metal back-gate and structure formed thereby Dec. 5, 2006
7122452 Method of manufacturing a semiconductor on a silicon on insulator (SOI) substrate using solid epitaxial regrowth (SPER) and semiconductor device made thereby Oct. 17, 2006
7122445 Peeling method Oct. 17, 2006
7115481 Method for concurrently producing at least a pair of semiconductor structures that each include at least one useful layer on a substrate Oct. 3, 2006
7094664 Method for fabricating semiconductor photodetector Aug. 22, 2006
7078262 Semiconductor wafer transport method and semiconductor wafer transport apparatus using the same Jul. 18, 2006
7071077 Method for preparing a bonding surface of a semiconductor layer of a wafer Jul. 4, 2006
7067393 Substrate assembly for stressed systems Jun. 27, 2006
7067394 Manufacturing of monolithically integrated pin structures Jun. 27, 2006
7064045 Laser based method and device for forming spacer structures for packaging optical reflection devices Jun. 20, 2006
7060591 Method for fabricating a semiconductor device by transferring a layer to a support with curvature Jun. 13, 2006
7057247 Combined absolute differential transducer Jun. 6, 2006
7052973 Bonded substrate for an integrated circuit containing a planar intrinsic gettering zone May. 30, 2006
7046328 Apparatuses and methods for flexible displays May. 16, 2006
7041178 Method for low temperature bonding and bonded structure May. 9, 2006
7037752 Semiconductor device and manufacturing method thereof May. 2, 2006
7029548 Method for cutting a block of material and forming a thin film Apr. 18, 2006
7029964 Method of manufacturing a strained silicon on a SiGe on SOI substrate Apr. 18, 2006
6995468 Semiconductor apparatus utilizing a preparatory stage for a chip assembly Feb. 7, 2006
6995691 Bonded structure using reacted borosilicate mixture Feb. 7, 2006
6991944 Surface treatment for multi-layer wafers formed from layers of materials chosen from among semiconducting materials Jan. 31, 2006
6987028 Method of fabricating a microelectronic die Jan. 17, 2006
6982209 Method of transferring devices by lateral etching of a sacrificial layer Jan. 3, 2006
6974760 Methods for transferring a useful layer of silicon carbide to a receiving substrate Dec. 13, 2005
6967149 Storage structure with cleaved layer Nov. 22, 2005
6955975 Method for joining a silicon plate to a second plate Oct. 18, 2005
6953735 Method for fabricating a semiconductor device by transferring a layer to a support with curvature Oct. 11, 2005
6951798 Method of bonding a stack of layers by electromagnetic induction heating Oct. 4, 2005
6946364 Integrated circuit having a device wafer with a diffused doped backside layer Sep. 20, 2005
6939778 Method of joining an insulator element to a substrate Sep. 6, 2005
6936497 Method of forming electronic dies wherein each die has a layer of solid diamond Aug. 30, 2005
6927144 Method for manufacturing buried insulating layer type single crystal silicon carbide substrate Aug. 9, 2005
6927085 Web fabrication of devices Aug. 9, 2005
6921706 Electronic assembly including a die having an integrated circuit and a layer of diamond to transfer heat Jul. 26, 2005
6913985 Method of manufacturing a semiconductor device Jul. 5, 2005
6909146 Bonded wafer with metal silicidation Jun. 21, 2005
6908828 Support-integrated donor wafers for repeated thin donor layer separation Jun. 21, 2005
6902987 Method for low temperature bonding and bonded structure Jun. 7, 2005
6897123 Bonding of parts with dissimilar thermal expansion coefficients May. 24, 2005
6890835 Layer transfer of low defect SiGe using an etch-back process May. 10, 2005
6890838 Gettering technique for wafers made using a controlled cleaving process May. 10, 2005

1 2 3 4 5 6 7 8 9


 
 
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