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Class Information
Number: 257/E21.12
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Processes or apparatus adapted for manufacture or treatment of semiconductor or solid-state devices or of parts thereof (epo) > Manufacture or treatment of semiconductor device (epo) > Device having at least one potential-jump barrier or surface barrier, e.g., pn junction, depletion layer, carrier concentration layer (epo) > Device having semiconductor body comprising group iv elements or group iii-v compounds with or without impurities, e.g., doping materials (epo) > Deposition of semiconductor material on substrate, e.g., epitaxial growth, solid phase epitaxy (epo) > Characterized by the substrate (epo) > Characterized by the post-treatment used to control the interface betw een substrate and epitaxial layer, e.g., ion implantation followed by annealing (epo)
Description: This subclass is indented under subclass E21.119. This subclass is substantially the same in scope as ECLA classification H01L21/20B20.

Patents under this class:
1 2 3

Patent Number Title Of Patent Date Issued
8647951 Implantation of hydrogen to improve gate insulation layer-substrate interface Feb. 11, 2014
8552616 Micro-scale power source Oct. 8, 2013
8536028 Self alignment and assembly fabrication method for stacking multiple material layers Sep. 17, 2013
8492250 Method for fabricating semiconductor device Jul. 23, 2013
8399340 Method of manufacturing super-junction semiconductor device Mar. 19, 2013
8314017 Method for manufacturing a low defect interface between a dielectric and a III-V compound Nov. 20, 2012
8288186 Substrate for growing a III-V light emitting device Oct. 16, 2012
8193068 Method of manufacturing SOI substrate Jun. 5, 2012
8148246 Method for separating semiconductor layer from substrate Apr. 3, 2012
8088672 Producing a transferred layer by implanting ions through a sacrificial layer and an etching stop layer Jan. 3, 2012
8067298 Relaxation of a strained material layer with application of a stiffener Nov. 29, 2011
8034694 SOI substrate, method for manufacturing the same, and semiconductor device Oct. 11, 2011
7998848 Method of producing field effect transistor Aug. 16, 2011
7994073 Low stress sacrificial cap layer Aug. 9, 2011
7977221 Method for producing strained Si-SOI substrate and strained Si-SOI substrate produced by the same Jul. 12, 2011
7977223 Method of forming nitride semiconductor and electronic device comprising the same Jul. 12, 2011
7977224 Method using multiple layer annealing cap for fabricating group III-nitride semiconductor device structures and devices formed thereby Jul. 12, 2011
7964483 Growth method for nitride semiconductor epitaxial layers Jun. 21, 2011
7927954 Method for fabricating strained-silicon metal-oxide semiconductor transistors Apr. 19, 2011
7897476 Method of manufacturing SOI substrate Mar. 1, 2011
7820524 Manufacturing method of SOI substrate and manufacturing method of semiconductor device Oct. 26, 2010
7820501 Decoder for a stationary switch machine Oct. 26, 2010
7795119 Flash anneal for a PAI, NiSi process Sep. 14, 2010
7790593 Method for tuning epitaxial growth by interfacial doping and structure including same Sep. 7, 2010
7759228 Semiconductor device and method of manufacturing the same Jul. 20, 2010
7700467 Methodology of implementing ultra high temperature (UHT) anneal in fabricating devices that contain sige Apr. 20, 2010
7682932 Method for fabricating a hybrid orientation substrate Mar. 23, 2010
7678602 CMOS image sensor and method for manufacturing the same Mar. 16, 2010
7648927 Method for forming silicon-containing materials during a photoexcitation deposition process Jan. 19, 2010
7622374 Method of fabricating an integrated circuit Nov. 24, 2009
7605062 Doped nanoparticle-based semiconductor junction Oct. 20, 2009
7585792 Relaxation of a strained layer using a molten layer Sep. 8, 2009
7524721 High voltage CMOS device and method of fabricating the same Apr. 28, 2009
7494903 Doped nanoparticle semiconductor charge transport layer Feb. 24, 2009
7442631 Doping method and method of manufacturing field effect transistor Oct. 28, 2008
7375011 Ex-situ doped semiconductor transport layer May. 20, 2008
7329596 Method for tuning epitaxial growth by interfacial doping and structure including same Feb. 12, 2008
7282381 Method of producing self supporting substrates comprising III-nitrides by means of heteroepitaxy on a sacrificial layer Oct. 16, 2007
7241670 Method to form relaxed SiGe layer with high Ge content using co-implantation of silicon with boron or helium and hydrogen Jul. 10, 2007
7186626 Method for controlling dislocation positions in silicon germanium buffer layers Mar. 6, 2007
7160804 Method of fabricating MOS transistor by millisecond anneal Jan. 9, 2007
7084051 Manufacturing method for semiconductor substrate and manufacturing method for semiconductor device Aug. 1, 2006
7056789 Production method for semiconductor substrate and production method for field effect transistor and semiconductor substrate and field effect transistor Jun. 6, 2006
7030002 Low temperature anneal to reduce defects in hydrogen-implanted, relaxed SiGe layer Apr. 18, 2006
7026249 SiGe lattice engineering using a combination of oxidation, thinning and epitaxial regrowth Apr. 11, 2006
7022593 SiGe rectification process Apr. 4, 2006
7018909 Forming structures that include a relaxed or pseudo-relaxed layer on a substrate Mar. 28, 2006
7019332 Fabrication of a wavelength locker within a semiconductor structure Mar. 28, 2006
7001826 Wafer with a relaxed useful layer and method of forming the wafer Feb. 21, 2006
6996147 Methods of fabricating nanostructures and nanowires and devices fabricated therefrom Feb. 7, 2006

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