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Class Information
Number: 257/E21.092
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Processes or apparatus adapted for manufacture or treatment of semiconductor or solid-state devices or of parts thereof (epo) > Manufacture or treatment of semiconductor device (epo) > Device having at least one potential-jump barrier or surface barrier, e.g., pn junction, depletion layer, carrier concentration layer (epo) > Device having semiconductor body comprising group iv elements or group iii-v compounds with or without impurities, e.g., doping materials (epo) > Deposition of semiconductor material on substrate, e.g., epitaxial growth, solid phase epitaxy (epo) > Using physical deposition, e.g., vacuum deposition, sputtering (epo) > Epitaxial deposition of group iv element, e.g., si, ge (epo)
Description: This subclass is indented under subclass E21.091. This subclass is substantially the same in scope as ECLA classification H01L21/203B.


Sub-classes under this class:

Class Number Class Name Patents
257/E21.094 Deposition on insulating or meta llic substrate (epo) 18
257/E21.093 Deposition on semiconductor substrate being different from deposited semiconductor material; i.e., formation of heterojunctions (epo) 14
257/E21.095 Epitaxial deposition of diamond (epo) 2


Patents under this class:
1 2

Patent Number Title Of Patent Date Issued
7442657 Producing stress-relaxed crystalline layer on a substrate Oct. 28, 2008
7419891 Method and system for providing a smaller critical dimension magnetic element utilizing a single layer mask Sep. 2, 2008
7416909 Methods for preserving strained semiconductor substrate layers during CMOS processing Aug. 26, 2008
7393762 Charge-free low-temperature method of forming thin film-based nanoscale materials and structures on a substrate Jul. 1, 2008
7387925 Integration of strained Ge into advanced CMOS technology Jun. 17, 2008
7384837 Method for isolating silicon germanium dislocation regions in strained-silicon CMOS applications Jun. 10, 2008
7371665 Method for fabricating shallow trench isolation layer of semiconductor device May. 13, 2008
7361528 Germanium infrared sensor for CMOS imagers Apr. 22, 2008
7354835 Method of fabricating CMOS transistor and CMOS transistor fabricated thereby Apr. 8, 2008
7348229 Method of manufacturing a semiconductor device and semiconductor device obtained with such a method Mar. 25, 2008
7344933 Method of forming device having a raised extension region Mar. 18, 2008
7341883 Silicon germanium semiconductive alloy and method of fabricating same Mar. 11, 2008
7338886 Implantation-less approach to fabricating strained semiconductor on isolation wafers Mar. 4, 2008
7329596 Method for tuning epitaxial growth by interfacial doping and structure including same Feb. 12, 2008
7288430 Method of fabricating heteroepitaxial microstructures Oct. 30, 2007
7279369 Germanium on insulator fabrication via epitaxial germanium bonding Oct. 9, 2007
7273818 Film formation method and apparatus for semiconductor process Sep. 25, 2007
7268027 Method of manufacturing photoreceiver Sep. 11, 2007
7247896 Semiconductor devices having a field effect transistor and methods of fabricating the same Jul. 24, 2007
7244654 Drive current improvement from recessed SiGe incorporation close to gate Jul. 17, 2007
7208362 Transistor device containing carbon doped silicon in a recess next to MDD to create strain in channel Apr. 24, 2007
7202121 Methods for preserving strained semiconductor substrate layers during CMOS processing Apr. 10, 2007
7199011 Method to reduce transistor gate to source/drain overlap capacitance by incorporation of carbon Apr. 3, 2007
7183168 Method of manufacturing a semiconductor device having a silicide film Feb. 27, 2007
7119032 Method to protect internal components of semiconductor processing equipment using layered superlattice materials Oct. 10, 2006
6649032 System and method for sputtering silicon films using hydrogen gas mixtures Nov. 18, 2003
6350311 Method for forming an epitaxial silicon-germanium layer Feb. 26, 2002
6344116 Monocrystalline three-dimensional integrated-circuit technology Feb. 5, 2002
6007624 Process for controlling autodoping during epitaxial silicon deposition Dec. 28, 1999
5937318 Monocrystalline three-dimensional integrated circuit Aug. 10, 1999
5854495 Preparation of nucleated silicon surfaces Dec. 29, 1998
5840589 Method for fabricating monolithic and monocrystalline all-semiconductor three-dimensional integrated circuits Nov. 24, 1998
5560777 Apparatus for making a semiconductor Oct. 1, 1996
5510011 Method for forming a functional deposited film by bias sputtering process at a relatively low substrate temperature Apr. 23, 1996
5424103 Method for making a semiconductor using corona discharge Jun. 13, 1995
5374846 Bipolar transistor with a particular base and collector regions Dec. 20, 1994
5254237 Plasma arc apparatus for producing diamond semiconductor devices Oct. 19, 1993
5169798 Forming a semiconductor layer using molecular beam epitaxy Dec. 8, 1992
4949146 Structured semiconductor body Aug. 14, 1990
4935375 Method of making a semiconductor device Jun. 19, 1990
4912538 Structured semiconductor body Mar. 27, 1990
4847216 Process for the deposition by epitaxy of a doped material Jul. 11, 1989
4843028 Method for producing a spatially periodic semiconductor layer structure Jun. 27, 1989
4838993 Method of fabricating MOS field effect transistor Jun. 13, 1989
4806502 Method for doping semi-conductor material during epitaxial growth Feb. 21, 1989
4785340 Semiconductor device having doping multilayer structure Nov. 15, 1988
4738624 Bipolar transistor structure with self-aligned device and isolation and fabrication process therefor Apr. 19, 1988
4707197 Method of producing a silicide/Si heteroepitaxial structure, and articles produced by the method Nov. 17, 1987
4563807 Method for making semiconductor device utilizing molecular beam epitaxy to form the emitter layers Jan. 14, 1986
4411728 Method for manufacture of interdigital periodic structure device Oct. 25, 1983

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