Resources Contact Us Home
Browse by Category: Main > Physics
Class Information
Number: 257/E21.083
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Processes or apparatus adapted for manufacture or treatment of semiconductor or solid-state devices or of parts thereof (epo) > Manufacture or treatment of semiconductor device (epo) > Device having at least one potential-jump barrier or surface barrier, e.g., pn junction, depletion layer, carrier concentration layer (epo) > Device having semiconductor body comprising cuprous oxide (cu 2 o) or cuprous iodide (cui) (epo) > Preparation of substrate, preliminary treatment oxidation of substrate, reduction treatment (epo) > Application of specified conductive layer (epo)
Description: This subclass is indented under subclass E21.079. This subclass is substantially the same in scope as ECLA classification H01L21/16B5.

Patents under this class:

Patent Number Title Of Patent Date Issued
7629203 Thermal interface material for combined reflow Dec. 8, 2009

  Recently Added Patents
Printed circuit board unit having routing unit mounted thereon and computer device having the same
Escalating data backup protection in response to a failure in a cluster of nodes
Methods of diagnosing a plasmodium infection
Image stabilization
Communication system including a switching section for switching a network route, controlling method and storage medium
Plants and seeds of corn variety CV335662
Laser marking of a card
  Randomly Featured Patents
Target outcome based provision of one or more templates
Methods of using predictive analog to digital converters
Spot type disc brake in particular internally straddling disc brake
Screw operated jack
Thermal detector comprising a thermal insulator made of expanded polymer
Filtering and deodorizing device for use with colostomy pouch
Nuclear fuel cladding having an exterior comprising burnable poison in contact with aqueous reactor coolant
Retractable swim fins
Color photographic element having improved contrast and compatibility with both dry and conventional processing
ESD protection for FinFETs